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CrossLink-NX Object Counting Using VGG 
Quick Start Guide 

 

Application Note 

FPGA-AN-02024-1.0 

May 2020 

 

Summary of Contents for CrossLink-NX

Page 1: ...CrossLink NX Object Counting Using VGG Quick Start Guide Application Note FPGA AN 02024 1 0 May 2020...

Page 2: ...AS IS and with all faults and all risk associated with such information is entirely with Buyer Buyer shall not rely on any data and performance specifications or parameters provided herein Products so...

Page 3: ...eparing the Dataset 7 2 3 Training the Machine 8 2 4 Generating Frozen pb File 11 3 Generating the Binary File 12 4 Programming the Bitstream and Binary files to VIP Board and SD Card 12 Technical Sup...

Page 4: ...sted at www latticesemi com legal All other brand or product names are trademarks or registered trademarks of their respective holders The specifications and information herein are subject to change w...

Page 5: ...that you are familiar with the basic Lattice FPGA design flow and mainly focuses on the Machine Learning part of the overall development process For detailed instructions of the design flow described...

Page 6: ...stered trademarks patents and disclaimers are as listed at www latticesemi com legal All other brand or product names are trademarks or registered trademarks of their respective holders The specificat...

Page 7: ...fying TensorFlow and Tool Environment Check if TensorFlow and your tool environment are installed correctly For the detailed procedure in creating the basic environment on PC refer to the Setting up t...

Page 8: ...training refer to the Training the Machine section in CrossLink NX Object Counting Using VGG CNN Accelerator IP FPGA RD 02200 To train the machine 1 Check the training dataset path in the training sc...

Page 9: ...emarks of their respective holders The specifications and information herein are subject to change without notice FPGA AN 02024 1 0 9 3 Run machine training In the command prompt execute run command F...

Page 10: ...are trademarks or registered trademarks of their respective holders The specifications and information herein are subject to change without notice 10 FPGA AN 02024 1 0 Figure 2 9 shows the image menu...

Page 11: ...re trademarks or registered trademarks of their respective holders The specifications and information herein are subject to change without notice FPGA AN 02024 1 0 11 2 4 Generating Frozen pb File To...

Page 12: ...on herein are subject to change without notice 12 FPGA AN 02024 1 0 3 Generating the Binary File For the detailed procedure in creating the binary file refer to the Creating Binary File with sensAI se...

Page 13: ...nd disclaimers are as listed at www latticesemi com legal All other brand or product names are trademarks or registered trademarks of their respective holders The specifications and information herein...

Page 14: ...patents and disclaimers are as listed at www latticesemi com legal All other brand or product names are trademarks or registered trademarks of their respective holders The specifications and informat...

Page 15: ...www latticesemi com...

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