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Programming Cables 

 

 

User Guide 
 

© 2009-2019 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at 

www.latticesemi.com/legal

 

All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. 

10 

 

FPGA-UG-02042-26.2 

Table 6.1. Pin and Cable Reference (Continued) 

HW-USBN-2B 
Flywire color 

TDI/SI 

TDO/SO 

TMS 

TCK/SCLK 

ISPEN/PROG 

DONE 

TRST(OUTPUT) 

VCC 

GND 

I2C: SCL 

I2C: SDA 

5 V Out 

Orange 

Brown 

Purple 

White 

Yellow 

Blue 

Green 

Red 

Black 

Yellow/White 

Green/White 

Red/White 

HW-USBN-2A 
Flywire color 

TDI 

TDO 

TMS 

TCK 

ispEN/PROG 

INIT 

TRST(OUTPUT)/DONE(INPUT) 

VCC 

GND 

na 

Orange 

Brown 

Purple 

White 

Yellow 

Blue 

Green 

Red 

Black 

HW-DLN-3C 
Flywire color 

TDI 

TDO 

TMS 

TCK 

ispEN/PROG 

na 

TRST(OUTPUT) 

VCC 

GND 

na 

Orange 

Brown 

Purple 

White 

Yellow 

Green 

Red 

Black 

Programming cable pin type 
Target Board Recommendation

 

Output 

Input 

Output 

Output 

Output 

Input 

Input/Output 

Input 

Input 

Output 

Output 

Output 

— 

— 

4.7 kΩ  

Pull-Up

 

4.7 kΩ  

Pull-Down

 

(Note 1) 

 

 

(Note 2) 

 

(Note 3) 

(Note 3) 

— 

Connect the programming cable wires (above) to the corresponding device or header pins (below).

 

Slave SPI Port Devices 

ECP5 

MOSI 

MISO 

— 

CCLK 

SN 

Optional connections to device  

PROGRAMN, INITN and/or DONE signals 

Required  Required 

— 

— 

— 

LatticeECP3 

MOSI 

MISO 

— 

CCLK 

SN 

Required  Required 

— 

— 

— 

MachXO2/MachXO3/MachXO3D 

SI 

SO 

— 

CCLK 

SN 

Required  Required 

— 

— 

— 

CrossLink™ LIF-MD6000 

MOSI 

MISO 

— 

SPI_SCK 

SPI_SS 

Opt.  

CDONE 

CRESET_B 

Required  Required 

— 

— 

— 

iCE40™/iCE40LM/iCE40 Ultra™/ 
iCE40 UltraLite™ 

SPI_SI 

SPI_SO 

— 

SPI_SCK 

SPI_SS_B 

Opt.  

CDONE 

CRESET_B 

Required  Required 

— 

— 

— 

I

2

C Port Devices 

MachXO2/MachXO3/MachXO3D 

— 

— 

— 

— 

Optional connections to device PROGRAMN, INITN 

and/or DONE signals 

Required  Required 

SCL 

SDA 

— 

Platform Manager II 

— 

— 

— 

— 

Required  Required  SCL_M + SCL_S  SDA_M + SDA_S 

— 

L-ASC10 

— 

— 

— 

— 

— 

— 

— 

Required  Required 

SCL 

SDA 

— 

CrossLink LIF-MD6000 

— 

— 

— 

— 

— 

Opt.  

CDONE 

CRESET_B 

Required  Required 

SCL 

SDA 

— 

Headers 

1 x 10 conn (various cables) 

9 or 10 

5 or 9 

— 

— 

— 

1 x 8 conn (see

 Figure 3.4

— 

— 

— 

— 

2 x 5 conn (se

Figure 3.5

10 

— 

2, 4,or 8 

— 

— 

— 

Programmers 

Model 300 

10 

— 

2, 4,or 8 

— 

— 

— 

iCEprog™ iCEprogM1050 

— 

10 

— 

— 

4 (Note 5) 

Summary of Contents for HW-USBN-2B

Page 1: ...Programming Cables User Guide FPGA UG 02042 26 2 May 2019...

Page 2: ...faults and all risk associated with such information is entirely with Buyer Buyer shall not rely on any data and performance specifications or parameters provided herein Products sold by Lattice have...

Page 3: ...information herein are subject to change without notice FPGA UG 02042 26 2 3 Contents 1 Features 5 2 Programming Cables 5 3 Programming Cable Pin Definitions 6 4 Programming Software 8 5 Target Board...

Page 4: ...2A 7 Figure 3 3 Programming Cable In System Programming Interface for the PC HW DLN 3C and Equivalents 7 Figure 3 4 Programming Cable In System Programming Interface for the PC pDS4102 DL2 or pDS4102...

Page 5: ...ion Figure 1 1 USB Cable HW USBN 2B 2 Programming Cables Lattice Programming Cable products are the hardware connection for in system programming of all Lattice devices After you complete your logic d...

Page 6: ...power for VCC Note This may not be the same as a target device s VCCO plane TDO SO Test Data Output Input Used to shift data out via the IEEE1149 1 JTAG programming standard TDI SI Test Data Input Ou...

Page 7: ...Yellow Green Purple Black White 61 25 pin Parallel Port Adapter HW7265 DL3 and HW7265 DL3A Grey Housing with RJ 45 Connector OtherCables are Labeled withPart Number To PC Figure 3 3 Programming Cable...

Page 8: ...ice families that feature low power it is recommended to add a 500 resistor between VCCJ and GND during the programming interval when a USB programming cable is connected to a very low power board des...

Page 9: ...N PROG na TRST OUTPUT VCC GND na Orange Brown Purple White Yellow Green Red Black Programming cable pin type Target Board Recommendation Output Input Output Output Output Input Input Output Input Inpu...

Page 10: ...Output Input Input Output Input Input Output Output Output 4 7 k Pull Up 4 7k Pull Down Note 1 Note 2 Note 3 Note 3 Connect the programming cable wires above to the corresponding device or header pins...

Page 11: ...al ICC 10 mA For devices that have a VCCJ pin the VCCJ must be connected to the cable s VCC For other devices connect the appropriate bank VCCIO to the cable s VCC A 0 1 F decoupling capacitor is requ...

Page 12: ...x Select the Set High radio button If the proper option is not selected the TRST pin is driven low by ispVM Diamond Programmer Consequently the BSCAN chain does not work because the chain is locked in...

Page 13: ...X X X X X 2 5 3 3 V Support X X X X X X X X X X 5 0 V Support X X X X X X X X X 2 x 5 Connector X X X X X X X 1 x 8 Connector X X X X X X X Flywire X X X X X X Lead free Construction X X X Available...

Page 14: ...try to install its own drivers that may not work If you have attempted to connect the PC to the USB cable without first installing the appropriate drivers or have trouble communicating with the Latti...

Page 15: ...marks or registered trademarks of their respective holders The specifications and information herein are subject to change without notice FPGA UG 02042 26 2 15 Figure A 3 Update Driver Software Browse...

Page 16: ...n herein are subject to change without notice 16 FPGA UG 02042 26 2 For Diamond installations browse to lscc diamond data vmdata drivers Click Next Select Install this Driver software anyway The syste...

Page 17: ...trademarks or registered trademarks of their respective holders The specifications and information herein are subject to change without notice FPGA UG 02042 26 2 17 Figure A 8 Installation Completed...

Page 18: ...C SDA value Changed ASC to L ASC10 Updated footnote 4 to include ispClock devices Adjusted trademarks Revision History Updated format Back cover Updated template Minor editorial changes Revision 26 1...

Page 19: ...ispEN Enable PROG SN and its description revised Updated Figure 2 Programming Cable In System Programming Interface for the PC HW USBN 2B Programming Cable ispEN Pin In Table 4 Programming Cable Feat...

Page 20: ...nt transferred to user s guide format Features Added Figure USB Cable HW USBN 2A Programming Flywire and Connection Reference Updated Recommended Cable Connections table for MachXO2 devices Target Boa...

Page 21: ...www latticesemi com...

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