Interfacing ispClock5600A
Lattice Semiconductor
with Reference Clock Oscillators
2
Figure 2. CMOS Oscillator Enabled
Figure 3. Initial Transitions of Enabled Oscillator
In this case where the reference oscillator is gated on, either by the output enable pin of the oscillator or by other
means of asynchronous enable, the RESET pin should be activated after the reference has been enabled and the
clock input to the ispClock is stable.
