Firmware
≤
11.00 - DMS 8.0 EN - 10/2011
L
469
8400 StateLine C | Reference manual
System bus "CAN on board"
Monitoring
10.10
Monitoring
10.10.1
Integrated error detection
If a node detects an error, it rejects the CAN telegram bits received so far and transmits an
error flag. The error flag consists of 6 consecutive bits with the same logic value.
The following errors are detected:
Bit error
The sending node follows the transmission on the bus and interrupts the transmission if it
receives a different logic value than the value transmitted. With the next bit, the sending
node starts the transmission of an error flag.
In the arbitration phase, the transmitter only detects a bit error if a dominantly sent bit is
received as recessive bit. In the ACK slot as well, the dominant overwriting of a recessive bit
is not indicated as a bit error.
Stuff-bit error
If more than 5 consecutive bits have the same logic value before the ACK delimiter in the
CAN telegram, the previously transmitted telegram will be rejected and an error flag will
be sent with the next bit.
CRC error
If the received CRC checksum does not correspond to the checksum calculated in the CAN
chip, the CAN controller will send an error flag after the ACK delimiter and the previously
transmitted telegram will be annulled.
Acknowledgement error
If the sent ACK slot recessively sent by the transmitting node is not dominantly overwritten
by a receiver, the transmitting node will cancel the transmission. The transmitting node
will annul the transmitted telegram and will send an error flags with the next bit.
Format error
If a dominant bit is detected in the CRC delimiter, in the ACK delimiter or in the first 6 bits
of the EOF field, the received telegram will be rejected and an error flag will be sent with
the next bit.
Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com