- 23 -
LGE Internal Use Only
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LG Electronics. Inc. All rights reserved.
Only for training and service purposes
BLOCK DIAGRAM
R
G
B
P
C
S
P
D
IF
Co
m
po
ne
nt
2 1
H
/P
O
U
T
H
D
MI
(D
V
I)
H
al
f
H
al
f
N
IM
N
IM
(S
I2
1
(S
I2
1
7
6
_
A
T
7
6
_
A
T
SC
_
1
I
SC
_
1
I
N
P
U
T)
N
P
U
T)
P
C A
ud
io
I
n
IF
+
/-
TU
_C
VB
S
SI
F
L/
R
S
7
LR
S
ER
IA
L F
LA
S
H
M
X
IC
(
8
M
b
it
)
M
X
2
5
L8
00
6
EM
2
I
LV
D
S
(F
H
D
/H
D
6
0
z)
A
. A
MP
N
TP
7
5
0
0
U
S
B
2
.0
D
P/
D
M
S
P
K
L
/R
X
-t
al
2
4
M
H
z
FP
C
(5
1
P
/F
H
D
)
I2
S
SP
D
IF
H
/P
L
/R
L/
R
CV
BS
,
Y/
Pb
/P
r,
L
/R
RG
B/
H
/V
R
ea
r
TM
D
S
D
D
R2
A
dd
.
D
D
R2
D
at
a
SP
I
A
V
Si
de
N
A
N
D
F
la
sh
(1
G
b
it
)
N
A
N
D
0
1
G
W
3
B
2
C
N
6
E
PC
M
_A
[0
:7
]
TM
D
S
H
D
MI
CV
BS
,
L/
R
D
D
R
3
2
5
6M
B
1
G
b
H
yn
ic
H
5
TQ
1
G
6
3D
FR
D
D
R
3
2
5
6M
B
(1
G
b)
H
yn
ic
H
5
TQ
1
G
6
3D
FR
C
O
N
TR
O
L
IR
&
L
ED
/
(S
O
FT
T
O
U
C
H
)
K
E
Y
1
K
E
Y
2
IR
L
E
D
_B
/L
G
L
O
G
O
A
T2
4
C
1
0
24
B
N
-S
H
-T
1
M
bi
t
I2
C
R
S
-2
3
2
C
FP
C
(3
0
P
/H
D
)
MA
X
3
2
3
2
RS
23
2C
S
E
N
S
O
R
_S
C
L
S
E
N
S
O
R
_S
D
A
LA
N
ET
_RX
/T
X
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