3. TECHNICAL BRIEF
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3. TECHNICAL BRIEF
3.1.3 Serial Flash (N25Q128, U202)
The N25Q128 is a 128 Mbit (16Mb x 8) serial Flash memory, with advanced write protection mechanisms.
It is accessed by a high speed SPI-compatible bus and features the possibility to work in XIP (“eXecution in
Place”) mode.
The N25Q128 supports innovative, high-performance quad/dual I/O instructions, these new instructions allow
to double or quadruple the transfer bandwidth for read and program operations.
•
SPI-compatible serial bus interface
108 MH (
i
) l k f
•
108 MHz (maximum) clock frequency
•
2.7 V to 3.6 V single supply voltage
•
Supports legacy SPI protocol and new Quad I/O or Dual I/O SPI protocol
•
Quad/Dual I/O instructions resulting in an equivalent clock frequency up to 432 MHz:
•
XIP mode for all three protocols
– Configurable via volatile or non-volatile registers (enabling the memory to work in XiP mode directly after
power on)
•
Program/Erase suspend instructions
d f
l
•
Continuous read of entire memory via single instruction:
– Fast Read
– Quad or Dual Output Fast Read
– Quad or Dual I/O Fast Read
•
Flexible to fit application:
– Configurable number of dummy cycles
– Output buffer configurable
– Fast POR instruction to speed up power on phase
– Reset function available upon customer Request
•
64-byte user-lockable, one-time programmable (OTP) area
•
Packages VDFPN8(F8) 8 x 6 mm(MLP8)
Figure 3.3 N25Q128 Block Diagram
