LG GCE-8480B, Service Manual

Page 1: ...on and real time layered error correction at each speed 6 PIO Mode 4 Multi DMA Mode 2 UDMA Mode 2 7 Multimedia MPC 3 Spec compliant 8 Support CD TEXT read write 5 Audio 1 Output 16 bit digital data over ATA interface 2 8 Times Digital Filter for CD Audio 3 Software Volume Control 4 Equipped with audio line output and headphone jack for audio CD playback 5 Front panel Volume Control for Headphone O...

Page 2: ...en there is no power 4 Volume control This is used to adjust the output volume of the headphone jack It can t be used to adjust the output volume for the audio output connectors on the rear panel NOTE Turn the volume down before turning on the power Sudden loud noises can damage your hearing 5 Headphone jack This jack is for connecting headphones or mini speakers 6 Drive activity indicators Two co...

Page 3: ... damage the system Always turn the power OFF when connecting or disconnecting the cable 3 Jumper Connector This jumper determines whether the drive is configured as a master or slave Changing the master slave configuration takes effect after power on reset 4 Analog Audio Output Connector Provides output to a sound card analog signal Generally you need this to play a regular audio CD 5 Digital Audi...

Page 4: ... Circuit Board A Remove the Cabinet in the direction of arrow 4 See Fig 1 3 B Release 2 hooks a and remove the CD Tray drawing forward C Remove the Main Circuit Board in the direction of arrow 5 D At this time be careful not to damage the 4 connectors are positioned at right side of the Main Circuit Board 2 MECHANISM ASSY DISASSEMBLY 2 1 Pick up Unit A Release screws B B Separate the Pick up Unit ...

Page 5: ...2 2 Pick up A Release 2 screws C and remove the Pick up Pick up Unit Pick up C C Fig 2 2 9 ...

Page 6: ...changed conditions of disc and change in operating temperature Jitter The 1ø value of the time variation between leading and trailing edges of a specific Mark pit or land as measured by Time Interval Analysis Deviation The difference between a fixed value of Pit length and Land length TOC Table Of Contents in the Lead in Area the subcode Q channel contains information about the Track on the disc P...

Page 7: ...tch p Radial Direction Iw A O a a Groove Land Radial Error Signal The Groove wobble Average center Actual center 16 CD ROM READ ONLY DISC a 30nm ITEM CD ROM CD R CD RW Standard Yellow Book Orange Book II Orange Book III Record Not available Write once Re Writable Tracking Signal I11 Itop 0 6 0 6 0 55 M11 0 70 HF Modulation Read Laser Power mW 0 5 mW 0 7 mW 1 0 mW Jitter 35 nsec 35 nsec 35 nsec Ref...

Page 8: ...n the disc It is so called WORM Write Once Read Many CD It is composed of polycarbonate layer Organic dye layer Reflective layer and Protective layer Gold Silver Reflective layer is used to enhance the reflectivity According to the kinds of Organic dye layer it is divided by Green CD Gold CD Blue CD Laser Wavelength 780 nm Laser Power read 0 7 mW Recording Power 8x 14 20mW 12x 15 30mW 16x 25 35mW ...

Page 9: ... reading is enabled by the difference of reflectivity It is possible to overwrite about 1000 times Laser Wavelength 780 nm Laser Power Read 1 0mW Recording Power Erase 4 18mW Write 6 45mW When disc rewriting new data is overwritten previously recorded data Polycarbonate layer has a Pre Groove which make a track Lens H D Beam Spot Focusing Lens Laser Spot at Constant Read Intensity Reflected Light ...

Page 10: ...Spot Recorded Mark Reflected Light Signal Reflected Light Signal Below ORP Mark Too Short At Optimum Record Power ORP Above ORP Mark Too Long Time 6 Writing process of CD RW Disc Write Power Erase Power Read Power Groove Crystal Amorphous Amorphous Recorded state lower reflectivity Melting quenching Heating gradual cooling Crystal phase Erased state higher reflectivity ...

Page 11: ...Area Lead out Area Center hole Clamping and Label Area Information Area PCA PMA Test Area Count Area Diameter 15 mm Diameter 45 mm Diameter 120 mm Unrecorded Disc Tsl 00 35 65 Tsl 00 15 05 Tsl 00 13 25 Tsl 99 59 74 00 00 00 in out Test Area for performing OPC procedures Count Area to find the usable area immediately in T A Tsl start time of the Lead in Area as encoded in ATIP PMA Program Memory Ar...

Page 12: ...ead_In area so that general Driver can read it Because PCA and PMA area exist before Lead In area General CD Player or CD ROM Drive can t read these areas 9 OPC and ROPC 1 OPC Optimum Power Control This is the first step of writing process because CD writer has its own laser power value and media have different writing characteristics This is determined by the Writing characteristic speed temperat...

Page 13: ...stant on the Recorded Disc Procedure of ROPC a Reference B level is determined during OPC Procedure b During Recording B level value is controlled to have a close Reference B level value c Normalization of B level is used to eliminate the effect of reflectivity fluctuation The reflected B level value is normalized by the disc reflectivity itself 22 CD R RW Media Write Strategy Determination PCA Te...

Page 14: ...d procedure the drive can not find any error in the linking area the data or audio will be regenerated perfectly 13 Optimum record speed To prevent record fail or readability problem of recorded disc the drive should decide optimum recording speed during the recording for the media 1 All media do not support 48x recording by media quality Even though a CD R can be recorded by 48x there is a possib...

Page 15: ...cording quality compare to P CAV 1 It is difficult to control servo stability of CAV recording 2 It has a difficulty in getting the high Recording quality relative to Zone CLV 1 Recording time is longer than partial CAV 2 It needs to control the spindle in speed change area Data transfer rate RPM Full Partial CAV 16X 40X CLV Time CLV Speed change Time 0 24X 32X Zone CLV 40X PCLV Time Spindle Mode ...

Page 16: ...terminal IC1 CXA2660N IC2 C1 C2 C3 GND G D C E RRF WRF GND H A B F Vc VLIM GND GND GND Vcc Vc Bin OUT PDIN VOUT VCC VREF VCC GND IOUT IINR IOUT IIN2 GND IIN3 GND RFREQ RAMP GND ENABLE GND OSCEN WEN3 VCC WEN2 GND GND 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 6 5 4 3 2 1 FCS FCS TRK TRK LIM G D C E RRF WRF PDGND PDVC F B A H PDVCC FPDO FPDVCC FPDGND FPDVC LDVCC LDVCC...

Page 17: ... Method A D B C k x F H E G This signal is generated in RF IC IC401 MT1516 and controls the pick up s left and right shift to find to track on Disc 3 RF Signal A B C D This signal is converted to DATA signal in DSP IC IC101 MT1518 26 Pick Up module Photo Diode Tracking Focusing Infrared Iaser k F H E G A D B C A D B C k F H E G Offset TE Tp Sub2 Main Tp 2 Sub1 Track Center F E D C A B H G ...

Page 18: ... power control loops in MT1516 which are used with different combination for different applications Generally the first APC loop is used for read power control The 2nd APC loop is used for write erase power control for CD R CD RW disc Owing to the small signal level in read power control mode the first APC loop amplifies x5 x10 x15 20x the FMD signal FPDO to enhance the accuracy of read power cont...

Page 19: ...ion block in RF IC MT1516 using Astigmatism Method Focus Gain and path can be changed at the RF IC MT1516 according to the disc and the resulting output FE MT1516 42pin is input to DSP IC MT1518 42pin The SBAD Signal MT1516 49pin is from the sum of Side Beam E F G H represents Beam Strength and input to DSP IC MT1518 38pin The Focus Search operation is using FE SBAD Signal therefore check FE SBAD ...

Page 20: ...01 MT1516 IC101 MT1518 MUTE2 MUTE1 MPPO A D B C G HAVC LS to V14 101 102 45 40 23 L P F L P F SPPO K F H E G Sled Compensator PWM FMO 26 FMO2 27 A A B B SLED MOTOR Unit TRO 1 4V R148 IC501 BD7907 C561 R561 IC505 R567 TRK TRK CTL1 CTL2 MUTE2 MUTE1 C187 VC 1 4V TRKIN 52 27 22 23 46 45 FMO 28 FMO2 29 R148 R148 C154 C156 SLIN1 SLIN2 A A 46 45 B B 46 45 SLO1 SL01 SLO2 SLO2 29 ...

Page 21: ... A B B SLED MOTOR Unit A D B C K F H E G 40 41 G HAVC LS to V14 L P F 126 46 47 48 RF RP SL V C480 G HAVC LS to V14 43 L P F MPPO Vref TEO RFZC RFZC DRCO DRCO2 R456 C489 CSI FMO D A C Tracking Compensator IC101 MT1518 23 Sled Compensator A D C 26 27 27 M U X Short Seek Algorithm Loog Seek Algorithm P W M 27 102 26 TRO FMO2 Track Counter and Timer R141 C142 RFZC TEO CSI TEI TEZILP HRFZCI CSI ...

Page 22: ...utput signal TRO MT1518 22pin is input to Drive IC BD7907 23pin The drive output signal TRK TRK generated according TKIN BD7907 52pin and drives tracking actuator in the P U unit 3 2 2 Sled Servo The working distance of tracking actuator is too short to cover whole disc radius Sled Servo make P U move by little and little so that the laser beam keep tracing the data track on disc continuously when...

Page 23: ...e spindle controller PWM output signal DMO MT1518 25pin input to SPIN in Drive IC BD7907 24pin after Low Pass Filtering The PWM output signal U V W signal BD7907 9 11 18 drives Spindle Motor using Hall Sensor Output signal HU HU HV HV HW HW and SPIN 32 Disc Motor unit Optical Pick up KRS 340B RFSUM A C B D Offset Adj RFOUT IC401 MT1516 MUTE2 MUTE1 EQRF G 101 102 21 19 G OSTCC 13 C430 RFIP Data Sli...

Page 24: ... CAV CD R CD RW 4 CD 48x CAV CD ROM When drive read PRESS CD Closed Session CD R RW the spindle motor is controlled using FG CAV Spindle Servo FG signal BD7907 21pin input to FGIN in DSP IC MT1518 20pin The spindle controller in DSP IC uses FGIN as spindle rotation frequency feedback therefore the FG CAV Spindle Servo doesn t work well if FG generation is abnormal The spindle controller PWM output...

Page 25: ...led using Wobble CLV Spindle Servo The ATFG signal MT1516 116pin input to DSP IC MT1516 69pin The DSP Controller in MT1518 uses ATFG as linear velocity feed back therefore the Wobble CLV Spindle Servo doesn fl t work well when ATFG signal is abnormal The two types are in the Wobble CLV Spindle Servo The one is pre sync mode the other is sync mode When Wobble CLV Spindle Servo drives the spindle mo...

Page 26: ...only the power cable BD7907FS 6Ch Servo DRIVE MT1516 RF Amp Wobble ALPC General port use EEPROM access MT1508 DSP Decoder Encoder ATIP Demodulator Write Strategy Write S H Signal I F Micro Processor 33 8688MHz IC 101 IC 501 IC 103 IC 401 IC 102 3 3 V Reset 12V 5V AT49F002N 512KB Flash ROM IC 502 41 109 44 2 54 3 1 3 32 10 19 20 31 32 30 44 51 IC 202 2 170 PRST L 122 HRST H 74 75 MCLK 55 H XRST SDR...

Page 27: ...PDO 2 8V pin 54 65 of IC401 BD7907FS 6Ch Servo DRIVE MT1516 RF Amp Wobble ALPC General port use EEPROM access MT1518 DSP Decoder Encoder ATIP Demodulator Write Strategy Write S H Signal I F Micro Processor IC 101 IC 501 CN 201 2 5 V NJM 3414 IC 503 76 75 3 2 1 IC 506 3 VHAVC 2VREF 52 2 8 V V28 IC 401 76 VREF 53 1 4 V V14 27 2 1 4 V VC Optical Pick up KRS 340B LD Drive 17 28 76 134 180 3 3 V 34 13 ...

Page 28: ...e Spindle signal pin 24 of IC501 SPIN Check FG input pin 20 of IC101 Check the Hall signal pin 1 2 3 4 5 6 of IC501 Check the operation of Focus Focus up Down Laser Off Spindle Stop BD7907FS 6Ch Servo DRIVE MT1518 DSP I F Micro Processor IC 101 IC 501 FMO 27 1 4 V VC 20 21 FG FG 25 24 SPIN DMO 18 11 9 Optical Pick up KRS 340B STEP Motor Spindle Motor 6 5 4 23 CTL2 22 CTL1 29 SLIN2 28 SLIN1 37 36 3...

Page 29: ...omes from a Hall sensor of spindle motor and they were inputted to pin 1 2 3 4 5 6 of drive IC BD7907FS via CN402 When spindle motor rotate HU HW HV signals are generated in a regular order with 1200 phase delay each other Refer Fig 2 If waveforms of HU HU HV HV HW HW different from Fig 2 check the pin 7 HB signal of drive IC The HB signal must be about 5V Wave of U V W assigned to pin 9 11 18 of ...

Page 30: ...eck SCLK SDATA XLAT pin 122 123 124 of IC401 Check operation S W of tray OPEN SW pin 94 of IC401 LOAD SW pin 95 of IC401 M Tray Motor MT1516 RF Amp General port use IC 401 123 124 122 SCLK SDATA XLA T MT1508 DSP Decoder Encoder I F Micro Processor IC 101 SW103 DETECTOR TRAY 63 62 65 FRONT BD7907FS 6Ch Servo DRIVE IC 501 22 101 DRV MUTE2 DRV MUTE1 CTL2 CTL1 27 1 4 V VC 24 26 LDIN 49 50 SW102 EJECT ...

Page 31: ...Micro Processor H O S T 8MB SDRAM I F cable Address Data IC 101 IC 103 IC 102 AT49F002N 512KB Flash ROM 33 8688MHz 74 75 Address Data Pin no Pin name Pin no Pin name 39 DASP GND 40 37 CS1 CS3 38 35 DA0 DA2 36 33 DA1 PDIAG 34 31 INTRQ IO16 32 29 DMACK GND 30 27 IORDY CSEL 28 25 IOR GND 26 23 IOW GND 24 21 DMARQ GND 22 19 GND KEY 20 17 HD0 HD15 18 15 HD1 HD14 16 13 HD2 HD13 14 11 HD3 HD12 12 9 HD4 H...

Page 32: ...ck the signal of SLED pin 28 29 of IC501 SLIN1 2 Check control signal of Drive IC pin 22 23 of IC501 CTL1 2 Check power and VC of DRIVE IC Check signal of A H pin 39 38 37 36 30 31 32 33 of IC401 Check the input signal of TE pin 40 of IC101 TEI In case of Focus Up Down MT1516 RF Amp General port use IC 401 123 124 122 SCLK SDATA XLA T MT1518 DSP Decoder Encoder I F Micro Processor IC 101 63 62 65 ...

Page 33: ...ack Following Sequential Read refer to Fig 6 By Sled Servo SLIN1 SLIN2 pin 28 29 of Drive IC drive the Sled Motor Stepping Motor for locating the lens on the center axis of Pick up Waveform of Track Jump refer to Fig 7 Center level of TE CE is 1 4V SLIN1 SLIN2 signal pin 28 29 of Drive IC assume the form of Pulse And they drive the Sled Motor Stepping Motor RFZC RF Ripple Zero Cross signal is Puls...

Page 34: ...Check FG input pin 20 of IC101 Check the input signal of ATFG pin 69 of IC101 Check the control signal of Drive IC pin 22 23 of IC501 Check power VC of DRIVE IC BD7907FS 6Ch Servo DRIVE MT1518 DSP Decoder Encoder I F ATIP Demodulator Micro Processor IC 101 IC 501 27 1 4 V VC 20 21 FG FG 25 24 SPIN DMO 18 11 9 Optical Pick up KRS 340B STEP Motor Spindle Motor 6 5 4 23 CTL2 22 CTL1 3 2 1 U V W HU HU...

Page 35: ...icro Processor IC 101 110 EEP CS IC 401 107 EEP SDATA 123 124 122 63 62 65 SCLK SDATA XLA T 108 EEP CLK AT93C86 2KB EEPROM IC 203 1 4 DO CS 3 DI 2 SLK ALPC initial value before Laser Power Setting MT1518 Check Laser 1 Check EEPROM Activate Addition Func window in Test Tool GGOOM5 Execute S N Identify Serial Number Execute ALPC Parameters Identify ALPC Parameters Check the communication line of EEP...

Page 36: ...C pin 25 of CN201 0 4 0 8V Check the input of FPDO pin 54 65 of IC401 FPDO 0 1V Check the input of RLDON pin 128 of IC401 H Check SCLK SDATA XLAT pin 122 123 124 of IC401 Check Reference voltage NG F NG G VWDC1 LEVEL FPD VWDC2 FPD MT1516 ALPC MT1518 Decoder Encoder Write Strategy Write S H Signal Micro Processor IC 101 CN 201 5 ENBL IC 401 Optical Pick up KRS 340B LD Drive 33 0 4 0 8V 19 FPDO 54 6...

Page 37: ...C401 H Check SCLK SDATA XLAT pin 122 123 124 of IC401 MT1516 ALPC MT1518 Decoder Encoder Write Strategy Write S H Signal Micro Processor IC 101 CN 201 5 ENBL IC 401 Optical Pick up KRS 340B LD Drive 33 13 30 0 4 1 0V WXR WXR 19 FPDO 54 65 FPDO FPDOLP ENBL 123 124 122 63 62 65 SCLK SDATA XLAT 62 26 VWDC1O VWDC1 61 27 VWDC2O VWDC2 0 1 0 5V 15 31 ODON ODON 127 58 WLDON WXR ODON FPDO CD R Recording Pu...

Page 38: ...401 Check Output signal of AUDIO L R pin 1 7 of IC801 Check Input signal of AUDIO L R pin 3 5 of IC801 Check Input signal of AUD MUTE pin 3 of IC801 Output of Headphone MT1516 RF Amp General port use MT1508 DSP Decoder Encoder I F Micro Processor IC 101 BH3544F AUDIO AMP IC 801 103 IC 401 LO 165 RO 167 AUDIO Line Out 51 54 CN 100 JK101 H JACK SB 3 5 3 Audio Mute Circuit 1 7 123 124 122 63 62 65 SC...

Page 39: ...propriately then GCE 8480B displays on Target Device 8 Select GCE 8480B on Target Device and then Click OK B Check ALPC Parameters 1 Select VIEW on the menu bar 2 Click Addition Func on VIEW window New frame will be displayed 3 Click ALPC Para tab ALPC Parameters 1 CD R READ Reference DAC 60 185 2 CD RW READ Reference DAC 60 185 3 VWDC1 VWDC1 Offset 225 296 4 VWDC1 Offset 30 175 5 VWDC2 VWDC2 Offs...

Page 40: ...Power Setup window Laser beam will be emitted from LD 5 Measure LD Power with LD Power meter Type the result in the blank Read Power box Ex 1 65mW 165 6 Click VWDC1 button and follow above step 5 But VWDC1 result should be filled in the Write Power box Ex 22 85mW 2285 7 Click Setup button and result will be displayed with OK or NG 8 Close Laser Power Setup window 65 Laser Power Setup window Laser ...

Page 41: ...ction VRDC VWDC1 2 FPD Level check 1 Remove disc on the Tray 2 Select ALPC OPC on the menu bar and select Laser Inspection menu then Laser Power Test window will appear 3 Click Trigger button then the result will be displayed with OK or NG separately 4 Close Laser Power Test window ...

Page 42: ...en window will appear 3 Select specific mode of ALPC Test mode and click Trigger button then LD will be on 4 Implement test like measuring LD Power 5 Click Stop button then LD Off Caution Laser beam is emitted continuously on the VRDC Loop and CW Power Test Pulse_Type Laser output like real writing is emitted on the CD R Rec Mode and CD RW Rec Mode ...

Page 43: ...0B SDRAM 2MB I F cable Data Address STEP Motor FCS TRK Spindle Motor Writing Pulse Servo S H Write S H Signal Data Clock XLAT Reset Line Out L R AT93C86 2KB EEPROM EQRF RRF FEI TEI CSI DMO FOO TRO SLO Address Data PWM out F PD ABCD EFGH IC 401 IC 101 IC 501 IC 103 IC 102 Audio L R 3 3 V Reset 5V 12V IC 203 AT49F002N 512KB Flash ROM LD Drive VWDC VRDC 2 5 V FG M Tray Motor Drive Mute LED Control Me...

Page 44: ... IND HAVC EQRF VCON GAINUP EQRF RFSUM MPXOUT1 VREFMPX AVDD1 AVSS1 AVDD2 AVSS2 AVDD3 AVSS3 AVDD4 AVSS4 AVDD5 AVSS5 AVDD6 AVSS6 AVDD7 AVSS7 AVDD8 AVSS8 AVDD9 AVSS9 SDATA XLAT SCLK DRCSO DRCMO SLPFN SLPFP XDEFM DEFM RRFXLP H11T INH ING INF INE DRCO INA HAVC IND INB INC TROPEN TRAYOUT TRAYIN LED1 LED2 LIMIT FR ENDM MUTE SB DEVSEL EEP_SDATA EEP_SCLK EEP_CS ENBL GIO1 GIO7 General I O SUBGND TRCLOSE ATIP...

Page 45: ...3_5 UP3_4 URST UP3_1 UP3_0 CLV CAV Controller Audio Effect Interface Audio DAC PWM DAC Buffer Memory Controller Servo ADC C3 Encoder Sync Protection Data PLL Data Slicer DPLLVDD IREF LPFIN DPLLVSS LPFIP LPFON LPION LPFOP LPIOP DMO FG VPVDD VCOCIN VPVSS ENDM C3 Decoder CIRC Encoder EFM modulatoin Subcode generator System Clock Generator ASP Control Interface Write Strategy Interface Logic Servo sta...

Page 46: ...SBADLP Analog Input Input of SBAD Signal after LPF for DEFECT Detection 46 SHPC Analog Output External Capacitor Connection for Peak Hold of RFRP Signal 47 RFZC1VC Analog Output Reference Voltage for RFRP Peak Bottom Hold 48 SHBC Analog Output External Capacitor Connection for Bottom Hold of RFRP Signal 126 RFZC Digital Output TTL 4 mA Driving Output of RF Zero Crossing Binary Signal EQRF RF Equal...

Page 47: ...MT S H Control Pulse for Write APC Mode 55 RREF Analog I O 1 Input of Power Setting Voltage for Read APC 2 Output of Read APC Reference Voltage Generated by Built in DAC 59 VRDCN Analog Input Vin of Midcourse Amplifier for Read APC Loop 58 VRDC Analog Output Midcourse Output of Laser Diode Controlling in Read Mode 63 VRDCO Analog Output Output Voltage of Laser Diode Controlling in Read APC 53 WREF...

Page 48: ...0K Pull Up SMT Sledge Inner Limit Input Active Low 106 DEVSEL Digital Input TTL 50K Pull Up SMT Device Select Cleared to ZERO Indicates the Driver is Master Device Set to ONE Indicates the Driver is Slave Device 100 FR Digital Input TTL SMT Spindle Motor Reverse Detection Input 93 TROPEN Digital Output TTL 4 mA Driving Tray Open Output Initial Output 92 TRCLOSE Digital Output TTL 4 mA Driving Tray...

Page 49: ... Power Power Pin for Internal Analog Circuitry 5V 35 AVSS1 Analog Ground Ground Pin for Internal Analog Circuitry 60 AVDD2 Analog Power Power Pin for Internal Analog Circuitry 5V 64 AVSS2 Analog Ground Ground Pin for Internal Analog Circuitry 80 AVDD3 Analog Power Power Pin for Internal Analog Circuitry 5V 84 AVSS3 Analog Ground Ground Pin for Internal Analog Circuitry 20 AVDD4 Analog Power Power ...

Page 50: ...1 CSI Analog Input Central servo input 42 FEI Analog Input Focus error input 43 SRVADCVSS Ground Ground pin for servo ADC circuitry 44 RFIN Analog Input RF negative signal input 45 RFIP Analog Input RF positive signal input 46 SRVADCVDD Analog Power 3 3V Power supply for servo ADC circuitry 47 RFDTSLVN Analog Input Negative input for analog slicer 48 SCOP Analog Output Positive low pass filter out...

Page 51: ...UP2_ 7 0 UA 15 8 3 3V LVTTL I O Slew rate 2mA 4mA 6mA 8mA PDR 75K pull up Programmable bi directional I O Alternate function A 15 8 Upper address bus input output 191 FLASH_WE 3 3V LVTTL output 4mA driving Flash memory write enable signal output low active 200 UP1_1 UA17 3 3V LVTTL I O Slew rate 2mA 4mA 6mA 8mA PDR 75K pull up Programmable bi directional I O Alternate function A17 Address bit 17 o...

Page 52: ... IPLL circuitry 105 IPLLVSS Ground Ground pin for IPLL circuitry EFMPLL VCO Interface 4 207 EFMPLLVDD Analog power 3 3V Power supply for EFMPLL circuitry 208 EFMVCOCIN Analog input EFMPLL VCO input For external loop filter connection 1 EFMLPFGND Analog input EFMPLL LPF ground input 2 EFMPLLVSS Ground Ground pin for EFMPLL circuitry Audio Output Interface 1 163 ADGO 3 3V LVTTL I O Slew rate 75K pul...

Page 53: ... from MT1516 to get RECD1 XTOR DEFECT automatically 57 RLDON 3 3V LVTTL I O 75K pull down 4mA driving Read laser diode on control signal Alternate function ICE mode selection input during power on stage PRST falling edge A logical low input indicates internal µP is used A logical high input indicates external µP is connected 58 WLDON 3 3V LVTTL output 4mA driving Write laser diode on control signa...

Page 54: ...hardware reset and is used to reset this chip 142 140 138 135 132 130 127 124 123 125 128 131 133 136 139 141 HD15 HD0 3 3V LVTTL I O Slew rate SMT 4mA 6mA 8mA 12mA PDR 40K 15K PPU 40K 15K PPD Host Data bus This is the 8 bit or 16 bit bi directional data bus to the host The lower 8 bits HD0 HD7 are used for 8 bit data transfers Normally data transfers are 16 bit wide Note All pins except HD7 no an...

Page 55: ...hardware reset and is used to reset this chip 142 140 138 135 132 130 127 124 123 125 128 131 133 136 139 141 HD15 HD0 3 3V LVTTL I O Slew rate SMT 4mA 6mA 8mA 12mA PDR 40K 15K PPU 40K 15K PPD Host Data bus This is the 8 bit or 16 bit bi directional data bus to the host The lower 8 bits HD0 HD7 are used for 8 bit data transfers Normally data transfers are 16 bit wide Note All pins except HD7 no an...

Page 56: ...CAS of the DRAM For SDRAM application this pin is column address strobe signal output connected to SDRAM 89 RWE 3 3V LVTTL Output Slew rate 2mA 4mA 6mA 8mA 10mA 12mA 14mA 16mA PDR RAM Write Enable RAM Write Enable Low RAM write enable signal low active When two write enable pins are used it is the Write Enable Low signal for writing the lower bytes of a two WE_ 16 bit RAM For SDRAM application thi...

Page 57: ...AM address bus Power Supply 27 91 143 196 3 DVDD33 Power 3 3V Power supply for input pad buffer circuitry 17 76 134 180 4 DVDD25 Power 2 5V Power supply for internal digital circuitry and general pad buffer circuitry 14 73 137 183 4 DVSS Ground Ground pin for internal digital circuitry and input pad buffer circuitry 7 67 86 111 129 150 6 DVDD33 Power 3 3V Power supply for output pad buffer circuit...

Page 58: ...ading driver positive output 49 LDO Loading driver negative output 48 TKO Tracking driver positive output 47 TKO Tracking driver negative output 46 FCO Focus driver positive output 45 FCO Focus driver negative output 44 AVM Actuator driver block power supply 43 GND GND 42 GND GND 41 GND GND 40 GND GND 39 GND GND 38 AGND Ground 37 SLO1 Sled driver 1 positive output 36 SLO1 Sled driver 1 negative ou...

Page 59: ...P Polarity COMP PWM OUT FG LIMIT LIMIT 15K 15K STBY BRAKE CONTROL 54 1 DVCC HU 2 HU 3 HV 4 HV 5 HW 6 HW 7 HB 8 PGND1 9 U 10 SPVM1 11 V 12 GND 13 GND 14 GND 15 GND 16 GND 17 PGND2 18 W 19 SPVM2 20 SPRNF 21 FG 22 CTL1 23 CTL2 24 SPIN 25 DGND 26 LDIN 27 VC 53 FCIN 52 TKIN 51 VCC 50 LDO 49 LDO 48 TKO 47 TKO 46 FCO 45 FCO 44 AVM 43 GND 42 GND 41 GND 40 GND 39 GND 38 AGND 37 SLO1 36 SLO1 35 SLO2 34 SLO2...

Page 60: ...02 A01 020 028 029 030 400 032 400 021 020 050 413 413 413 001 413 430 012 009 008 013 014 005 035 016 015 004 006 A B C D E F G H 1 2 3 4 5 017 003 002 010 011 030 400 400 031 027 026 034 025 430 419 021 400 11 12 EXPLODED VIEW ...