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Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
•
Block Diagram (SODC : MN103SC7G)
FEP
DRC
ANALOG
SERVO
debugger
CD
Write
DMA bus
ODC
(ECC command)
Internal
data memory
On-Chip
Debugger
Resistor bus
Watchdog
Timer
Interrupt
ion
Timer
General-
Purpose
Ports
PWM
Serial
I/F
32 bit
CPU
Bus
control
System
I/F
Clock
Generator
e
DRAM
I/F
LDD
FEP
CIRC
DVD
Formatter
DVD/CD
error
correction
ATAPI
I/F
HOST
eDRAM
16 Mbit
16.9 MHz
Flash
ROM
2 Mbytes