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Only for training and service purposes
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3. TECHNICAL BRIEF
ʹΠΡΪΣΚΘΙΥ͑ι ͣͨ͑͡͡ͽ͑ͶΝΖΔΥΣΠΟΚΔΤ͑͟ͺΟΔ͑͑͟ͲΝΝ͑ΣΚΘΙΥ͑ΣΖΤΖΣΧΖΕ͑͟
ΟΝΪ͑ΗΠΣ͑ΥΣΒΚΟΚΟΘ͑ΒΟΕ͑ΤΖΣΧΚΔΖ͑ΡΦΣΡΠΤΖΤ
ͽͶ͑ͺΟΥΖΣΟΒΝ͑ΆΤΖ͑ΟΝΪ
ZXVX[W
Transmitter
- Offset phase lock loop
- IQ modulator
- Integrated TX VCO
- Integrated loop filter
Frequency Synthesizer
- Programmable fractional-N synthesizer
- Integrated wide range RFVCO
- Integrated loop filter
- Fast settling time suitable for multi-slot GPRS/EDGE applications
Digitally-Controlled Crystal Oscillator (DCXO)
- One-pin 26 MHz crystal oscillator
-On-chip programmable capacitor array for coarse tune
- On-chip programmable capacitor array for fine tune
RFSYS in a-QFN package
3. TECHNICAL BRIEF
ʹΠΡΪΣΚΘΙΥ͑ι ͣͨ͑͡͡ͽ͑ͶΝΖΔΥΣΠΟΚΔΤ͑͟ͺΟΔ͑͑͟ͲΝΝ͑ΣΚΘΙΥ͑ΣΖΤΖΣΧΖΕ͑͟
ΟΝΪ͑ΗΠΣ͑ΥΣΒΚΟΚΟΘ͑ΒΟΕ͑ΤΖΣΧΚΔΖ͑ΡΦΣΡΠΤΖΤ
ͽͶ͑ͺΟΥΖΣΟΒΝ͑ΆΤΖ͑ΟΝΪ
ZWVX[W
3.5 RFSYS of MT6253 (U102)
3.5.1 GENERAL DESCRIPTION
RFSYS built in MT6253 SOC is a highly integrated RF transceiver for multi-band GMS and GPRS
cellular systems. The features are listed as following.
Receiver
- Direct conversion architecture
- Quad band differential input LNAs
- Quadrature RF mixers
- Fully integrated channel filter with f
3dB
=150kHz
- 95 dB gain with 60 dB gain control range
Figure. 3.5.1 Block DIAGRAM of RFSYS
3. TECHNICAL BRIEF