5. BLOCK DIAGRAM
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Copyright © 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
[D802] Main & External Display I/F
SLIMPORT
HDMI_HOT_PLUG_DET
CLKP / CLKN
D0P / D0N
D1P / D1N
D2P / D2N
CEC
DDC_SCL / SDA
HDMI_HPD_OUT
TX0P
USB 3.0
Connector
HS1_DP
USB_DP
DSV
EN
VOUT_P / N
CABLE_DET
INTP
RESETN
CHIP_PD_HV
CSDA
PMIC
GPIO_13
GPIO_14
ID_OUT
USB_ID
USB_ID
AMUX_USB_ID
USB_DN
CSCL
TX0N
HS1_DM
XTAl_OUT
XTAl_IN
27MHz
6. Main & External Display I/F
ANX7808
PM8941
+1V8_VREG_L12
BL Boost
LM3630
EN
SDA
SCL
LCD_PWM
WLED_A
WLED_C1
WLED_C2
Main Chipset (MSM8974)
LN0_P / LN0_N
TCLK_P / TCLK_N
TX0_P / TX1_N
TX1_P / TX1_N
CLK_P / CLK_N
TX2_P / TX2_N
MIPI_DSI0
HDMI
LN1_P / LN1_N
LN2_P / LN2_N
LN3_P / LN3_N
CEC
DDC_CLK / DATA
REXT
USB_HS1_DP
GPIO_58
GPIO_28
GPIO_68
GPIO_83
GPIO_25
GPIO_84
USB_HS1_DM
GPIO_12
GPIO_91
5.2” Full-HD LCD
LANE0_P / LANE0_M
CLK_P / CLK_M
LANE1_P / LANE1_M
LANE2_P / LANE2_M
LANE3_P / LANE3_M
+5V5_DDVDH / 5V5_DDVDL
MAKER_ID
IOVCC
LCD_VSYNC
LEDPWM
LED_A
LED_C1
LED_C2
RESET
GPIO_19