5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
To Page 9
To Page 8
To KSR16C
To U6
To U6
TO DMD
TO SDRAM
TO U6
TO FLASH
TO CPU
TO SDRAM
TO FLASH
TO U6
From CPU
(TO INPUT)
304-C03
1
DX660 DMD BD
3
12
Wednesday, April 17, 2002
BILL WJ CHANG
H.C.TSOU
48.J3401.S03
FAB:S03
ANGEL HU
99.J3477.001
A3
Title
Size
Document Number
Rev
Date:
Sheet
of
Project Code
Reviewed By
Approved By
Prepared By
INIT
TDI
RESETZA
SYSRSTZ
POWERGOOD
XPROGEN
FL_RSTZ
OE
HWBINSEL
SYNCVAL
CWINDEXA
SEQDATA0
SEQDATA1
SEQDATA2
SEQDATA3
SEQDATA4
SEQDATA5
SEQDATA6
SEQDATA7
BINSEL1
BINA
BINB
BINC
BIND
VNEGSEN
SR16MOD0
SR16SEL1
SR16ADR3
DMDVCCEN
SR16ADR0
SR16ADR2
SR16MOD1
SR16STRO
SR16SEL0
SR16ADR1
SR16VCCE
UROWENZA
SAC_BUSA
LAMPSYNC
SYSRSTZ
DMDACLKA
DMDMODE1A
LOADZA
DMDMODE0A
LOAD16A
COMPA
LSETA
BINSEL0
PWRGOOD
PARK_A
POWERGOOD
POWERGOOD
P3P3V
P3P3V
P3P3V
P3P3V
P3P3V
P3P3V
P3P3V
U5
2500911
151
147
138
132
128
122
113
109
60
59
31
42
141
126
140
163
167
40
46
164
47
100
36
57
120
133
116
137
56
48
50
150
152
110
115
114
9
8
17
123
77
108
26
55
78
106
130
154
183
205
2
14
25
37
49
67
79
90
101
119
131
142
160
171
182
194
172
202
201
189
188
193
192
198
197
196
195
170
173
176
177
143
144
145
146
111
44
38
136
135
169
168
149
127
129
134
39
45
41
43
28
27
24
23
29
30
21
22
75
76
80
81
95
96
97
98
99
13
12
7
6
15
16
18
19
20
11
10
139
SEQD0
SEQD1
SEQD2
SEQD3
SEQD4
SEQD5
SEQD6
SEQD7
MALSYNC
CTCRDY
MSMPLE
WSMPLE
BINSEL1
CWSPIN
BINSEL0
CWINDEX
LAMPLIT
VSYNCZ
RDY/BSYZ
SYNCVAL
HTSTPNT
SDRCLK
TFIELD
OE
HWBINSEL
RS
SPARE_INO
HPRSTZ
M2
M1
M0
PBDATA1
PCLKZ
SYSRSTZ
RESETZ
PWRGOOD
TCK
TDI
TMS
CSO
INIT
PROBRAMZ
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
SR16VCCEN
SR16STROBE
SR16OENZ
SR16MODE1
SR16MODE0
SR16SEL1
SR16SEL0
SR16ADDR3
SR16ADDR2
SR16ADDR1
SR16ADDR0
DMDVCCEN
VCC2SEN
VPBSEN
VNEGSEN
BINA
BINB
BINC
BIND
SYSRSTOZ
PLLRSTZ
HVSYNCZ
HRST
CWRSTZ
LAMPSYNC
LAMPEN
PBDATA0
CK2M
CK10M
CK14M
FPGATP2
ROM_OEZ
ROM_WEZ
CWINDEXO
MWCMD1
MWCMD0
MRCMD1
MRCMD0
MRSEL12Z
MOENZ
DSTART
DWSCBD
RASAZ
CASAZ
WENAZ
DQMA
RASBZ
CASBZ
WENBZ
DQMB
CKE
MODE1
MODE0
ACLK
LOADZ
LOAD16
COMP
LSET
SAC_BUS
SAC_EN
LROWENZ
UROWENZ
SPARE
C33
.047U
50V K
Q25
MMBT2222A
1
R111
2K
C27
.047U
50V K
R23
10K
RP4
47
1
2
3
4
8
7
6
5
R40
1K
C30
.047U
50V K
C24
.047U
50V K
R205
2K
C34
.047U
50V K
R114
2K
R148
10K
SW1
62.40019.001
1
4
2
3
R202
47
RP3
47
1
2
3
4
8
7
6
5
C31
.047U
50V K
R112
2K
Q26
MMBT2222A
1
R25
10K
R115
2K
R24
10K
C25
.047U
50V K
C35
.047U
50V K
R27
2K
C28
.047U
50V K
R116
2K
R109
2K
R26
10K
C32
.047U
50V K
R110
1M
C26
.047U
50V K
R28
1K
R22
10K
C29
.047U
50V K
P3P3V
RESETZ
LAMPLIT
VSYNCZ
CWINDEX
BINEEN
BINDEN
BINBEN
BINCEN
VPBSEN
VCC2EN
SR16VCCE
VNEGSEN
DMDVCCEN
SR16MOD1
SR16MOD0
SR16SEL1
SR16SEL0
SR16ADR1
SR16ADR3
SR16ADR0
SR16STRO
SR16ADR2
MALSYNC
CTMRDY
MSMPLE
WSMPL
CWSPIN
HTST_PNT
TMS
TCK
PBCLKZ
PBDATA1
FPGADCLK
TFIELD
FPGA_TDO
P6B5
UROWENZ
SAC_BUS
LSET
COMP
LOAD16
LOADZ
DMDACLK
DMDMODE0
DMDMODE1
RASAZ
CASAZ
WENAZ
DQMA
RASBZ
CASBZ
WENBZ
DQMB
CKE
DWSCBD
DSTART
MOENZ
MRSEL12Z
MRCMD0
MRCMD1
MWCMD0
MWCMD1
ROM_OEZ
ROM_WEZ
CK14MC1
H_VSYNCZ
HRSTZ
CK9P33M1
CK2P33M
LAMPEN
SDAB[0..11]
SDAA[0..11]
SEQDATA[0..7]
SEQADR[0..17]
INDEXOUT
SYSRSTZ
PLLRSTZ
PBDATA0
LAMPSYNC
SYNCVALID
POWERON
Summary of Contents for RD-JT40 1024X768 XGA
Page 7: ...LG RD JT40 41 Service Manual 7 External Control Panel ...
Page 8: ...LG RD JT40 41 Service Manual 8 Adjuster ...
Page 17: ...LG RD JT40 41 Service Manual 17 1 Display Menu ...
Page 18: ...LG RD JT40 41 Service Manual 18 2 Image Menu ...
Page 19: ...LG RD JT40 41 Service Manual 19 3 Source Menu ...
Page 34: ...LG RD JT40 41 Service Manual 34 12 Timing Chart ...
Page 45: ...LG RD JT40 41 Service Manual 45 16 PACKING DESCRIPTION CTN LBL PRINTING ...
Page 46: ...LG RD JT40 41 Service Manual 46 ...
Page 47: ...LG RD JT40 41 Service Manual 47 17 APPEARANCE DESCRIPTION ...
Page 48: ...LG RD JT40 41 Service Manual 48 SPEC LBL PRINTING LAMP LBL PRINTING ...
Page 49: ...LG RD JT40 41 Service Manual 49 18 Dimensions ...
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