Magnetic Instrumentation 942B, Instruction Manual

15 

Start Input Circuit 
 

The start circuit input on this board requires an external 10 VDC to 15 VDC power 
supply. The positive of this supply is connected to 2CN terminal 1 and the negative of the 
supply is connected to 2CN terminal 3. This supply powers two open-collector NAND 
gates and two opto-couplers. Pull-up resistor R1 maintains a high logic level on the input 
of U1A pins 1 and 2. When a low logic level is applied to the start input 2CN2, the output 
of U1A pin 3 goes to a high logic level. The instant U1A pin 3 goes high, Capacitor C3 
appears as a short circuit applying a high logic level to the input of U1B pins 6 and 7. R2 
serves as a pull-down resistor to the input of U1B pins 6 and 7, and R2 in combination 
with the value of C3 sets the duration of the gate drive output signal. When the high logic 
level is applied to the input of U1B pin 6 and 7, the output of U1B pin 5 goes low. This 
low logic level pulls current simultaneously through the input of the two opto-couplers. 
As C3 charges the high logic level on the input of U1B decreases. When the voltage on 
the input of U1B falls below approximately 2/3 of it supply voltage, the output of U1B 
pin 5 returns to a high, turning off the two opto-couplers and thus turning off the gate 
drive output.  
 

Driver Circuit 

 
Input AC power to the board is connected to 1CN between terminals 1 and 3, power line 
ground is connected to 1CN terminal 2. This power feeds the primary of two isolation 
transformers T1 and T2. T1 supplies the power for both gate drive circuits, and T2 feeds a 
negative bias supply. T1’s secondary is rectified by bridge rectifier D13 and filtered by 
capacitors C12 and C13. The green LED D15 indicates this driver’s power supply is 
active. The start input to the driver circuit is applied via opto coupler U3. Pin 5 of U3 is 
tied to the positive side of the drivers power supply. When the opto coupler is turned on 
the positive of the supply is seen at pin 4. This turns on transistor Q3, Note: This and the 
rest of the transistors in the circuit act as switches turning completely on and off. When 
Q3 turns on, its collector goes to a low logic level which in turn, turns off Q1 allowing its 
collector to go to a high logic level. The high level on the collector of Q1 turns on Q7. 
When Q7 is turned on its collector goes low which turns on Q8. Q8 is the last stage of the 
driver circuit. Q8 uses the stored energy in C12 to drive the output that applies power to 
the gate of an SCR. The combination of R20, and R21 with parallel capacitor C11, shapes 
the output pulse to provide a “Hard Gate Drive” signal. In the first instant when Q8 turns 
on, C11 appears as a short circuit and a sharp rising edge of current approximately 5 amps 
is applied to the gate of the SCR. As C11 charges the current reduces to a steady state of 
approximately 2 amps known as the “Back Porch” of the “Hard Gate Drive” signal. This 
all happens in approximately 200



 seconds.