I/O Expansion Module Overview
13
HMC3000 Series I/O Module Guide
13
HSC Configuration Register Bit table
Bits
Function
15-12
Not used
11-10
00: Reset counter if SW Reset bit or physical I/Preset bit goes from 0 to 1
01: Reset counter if the SW reset bit goes from 0 to 1
11: reserved for future use
9
Forced Output Configuration
0: Forced output ON for Preset 1
1: Forced output ON when enabled and OFF when Preset 1 reached
8
Forced Output Control
0: Forced Output Disabled
1: Forced Output Enabled
7-6
Quadrature mode
00: Reserved
01: Reserved
010: 4X Quadrature mode
4-5
HSC
00: Single Phase Up counter
3
0: Falling Edge
1: Rising Edge
2, 1, 0
Module Operating Mode
000: Normal Operation
010: Up Counter HSC
011: Quadrature
To Implement High-speed Counter Operation
1.
Connect a device that will provide the high-speed pulses to one of the high-speed inputs on the
expansion module.
2.
Configure the HSC using the configuration register for that channel.
Note: You can write to the configuration register value using the Power-Up logic block or in a Power-Up
Task.
3.
Write the HSC preset count value in that channel’s Preset Register.
4.
Enable the HSC by setting the HSC Enable Bit for that channel.
5.
HSC increments the current value register for that channel until the preset value is reached.
6.
Enable the HSC Reset Bit for that channel. This will cause the HSC current value to reset back to 0.
7.
To start the process again, simply reset (clear) the HSC Reset Bit and set the HSC Enable Bit.
Note: if the HSC Enable Bit is still ON, you must reset (clear) this bit, and then set it again.
Summary of Contents for HMC3-M0808P0401T
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