HMC7000 Series I/O Module Guide
84
HMC7000 Series I/O Module Guide
84
Configuration Register
Bit
Description
15-4
Reserved (leave set to 0)
3
Edge Trigger:
0 = Falling
1 = Rising
2,1,0
Counter Mode:
000 =High Speed Counter Off
010 = High Speed Up Counter
Other settings are reserved.
Note: You can write to the configuration register value using the Power-Up logic block or in a Power-Up Task.
Specific High Speed Counter Registers
The registers and I/O associated with the High-Speed Counter depend on the hardware.
For products with Built-In I/O (HMC7030A-L)
Function
Counter 1
Counter 2
Trigger Bit
X00001
X00002
Done Bit
Y00000
Y00001
Enable Bit
M00240
M00400
Reset Bit (Internal, Physical)
M00241, X00004
MW401, X00005
Configuration Register
MW0010
MW0020
Current Count Register (LSW, MSW)
MW0011, MW0012
MW0021, MW0022
Preset Register (LSW, MSW)
MW0013, MW0014
MW0023, MW0024