NCP380 (MAIN : U3017)
Terminal Function
Block Diagram
NCP380
http://onsemi.com
2
IN
OUT
EN
ILIM*
GND
NCP380
USB
Port
GND
D+
D−
VBUS
Rlim
USB INPUT
5V
EN
FLAG
USB
DATA
Rfault
*
Figure 1. Typical Application Circuit
100 k
1
F
120
F
FLAG
*For adjustable version only.
(Top view)
Figure 2. Pin Connections
1
2
3
6
5
4
OUT
ILIM*
FLAG
IN
GND
EN
PAD1
UDFN6
OUT
GND
FLAG
IN
EN
1
2
3
5
4
TSOP−5
1
2
3
6
4
OUT
ILIM*
5
FLAG
IN
GND
EN
TSOP−6
*For adjustable version only, otherwise not connected.
PIN FUNCTION DESCRIPTION
Pin Name
Type
Description
EN
INPUT
Enable input, logic low/high (i.e. EN or EN) turns on power switch
GND
POWER
Ground connection;
IN
POWER
Power−switch input voltage; connect a 1
F or greater ceramic capacitor from IN to GND as close as
possible to the IC.
FLAG
OUTPUT
Active−low open−drain output, asserted during overcurrent, overtemperature or reverse−voltage
conditions. Connect a 10 k
or greater resistor pull−up, otherwise leave unconnected.
OUT
OUTPUT
Power−switch output; connect a 1
F ceramic capacitor from OUT to GND as close as possible to the IC
is recommended. A 1
F or greater ceramic capacitor from OUT to GND must be connected if the USB
requirement (i.e.120
F capacitor minimum) is not met.
ILIM*
INPUT
External resistor used to set current−limit threshold; recommended 5 k
< R
ILIM
< 250 k
.
PAD1**
THERMAL
Exposed Thermal Pad: Must be soldered to PCB Ground plane
*(For adjustable version only, otherwise not connected.
**For DFN version only.
NCP380
http://onsemi.com
2
IN
OUT
EN
ILIM*
GND
NCP380
USB
Port
GND
D+
D−
VBUS
Rlim
USB INPUT
5V
EN
FLAG
USB
DATA
Rfault
*
Figure 1. Typical Application Circuit
100 k
1
F
120
F
FLAG
*For adjustable version only.
(Top view)
Figure 2. Pin Connections
1
2
3
6
5
4
OUT
ILIM*
FLAG
IN
GND
EN
PAD1
UDFN6
OUT
GND
FLAG
IN
EN
1
2
3
5
4
TSOP−5
1
2
3
6
4
OUT
ILIM*
5
FLAG
IN
GND
EN
TSOP−6
*For adjustable version only, otherwise not connected.
PIN FUNCTION DESCRIPTION
Pin Name
Type
Description
EN
INPUT
Enable input, logic low/high (i.e. EN or EN) turns on power switch
GND
POWER
Ground connection;
IN
POWER
Power−switch input voltage; connect a 1
F or greater ceramic capacitor from IN to GND as close as
possible to the IC.
FLAG
OUTPUT
Active−low open−drain output, asserted during overcurrent, overtemperature or reverse−voltage
conditions. Connect a 10 k
or greater resistor pull−up, otherwise leave unconnected.
OUT
OUTPUT
Power−switch output; connect a 1
F ceramic capacitor from OUT to GND as close as possible to the IC
is recommended. A 1
F or greater ceramic capacitor from OUT to GND must be connected if the USB
requirement (i.e.120
F capacitor minimum) is not met.
ILIM*
INPUT
External resistor used to set current−limit threshold; recommended 5 k
< R
ILIM
< 250 k
.
PAD1**
THERMAL
Exposed Thermal Pad: Must be soldered to PCB Ground plane
*(For adjustable version only, otherwise not connected.
**For DFN version only.
NCP380
http://onsemi.com
7
BLOCK DIAGRAM
Gate Driver
UVLO
Vref
TSD
Control logic
and timer
EN block
Flag
Osc
IN
OUT
/FLAG
GND
EN
Blocking control
Current
Limiter
ILIM*
Figure 5. Block Diagram
*For adjustable version only, otherwise not connected.
NCP380
P
MOSFET
MOSFET
¡
¢£¤¥
¦
§¨©ª«¬
®¯°±
NCP380
²³
´µ
¶´·
¸¦±
NCP380
¹
°
I
OCP
§
¯º
»º¼½¾¿ÀÁ¿¹
ÂÃÄ¥
−
ÅÆÇ ¨«ª¹
ÈÉ
Ä¥
NCP380
ÈÉÊ
°ËÌ
I
OCP
§
ͦ
¥
V
OUT
I
OCP
I
OUT
Drop due to
capacitor charge
Figure 6. Heavy capacitive load
−
Î
I
OCP
ͦ
Í
ÂÃÏÐѵĥ
V
OUT
R
LOAD
I
OCP
(eq. 1)
AK4458VN (MAIN : U3006)
Pin Function
No. Pin Name
I/O Function
PD State
1 MCLK
I External Master Clock Input Pin
Hi-Z
2
BICK
I Audio Serial Data Clock Pin in PCM mode
Hi-z
DCLK
I DSD Clock Pin in DSD mode
3
LRCK
I Input Channel Clock Pin in PCM mode
Hi-Z
DSDL1
I Audio Serial Data Input in DSD mode
4
SDTI1
I Audio Serial Data Input in PCM mode
Hi-Z
DSDR1
I Audio Serial Data Input in DSD mode
5
SDTI2
I Audio Serial Data Input in PCM mode
Hi-Z
DSDL2
I Audio Serial Data Input in DSD mode
6
SDTI3
I Audio Serial Data Input in PCM mode
100k Ω
Pull down
DSDR2
I Audio Serial Data Input in DSD mode
TDMO1
O Audio Serial Data Output in Daisy Chain mode
7
SDTI4
I Audio Serial Data Input in PCM mode
100k Ω
Pull down
DSDL3
I Audio Serial Data Input in DSD mode
TDMO2
O Audio Serial Data Output in Daisy Chain mode
8 DSDR3
I Audio Serial Data Input in DSD mode
Hi-Z
9 DSDL4
I Audio Serial Data Input in DSD mode
Hi-Z
10 DSDR4
I Audio Serial Data Input in DSD mode
Hi-Z
11
DZF
O Zero Input Detect in I2C Bus or 3-wire serial control mode
100k Ω
Pull down
SMUTE
I
Soft Mute Pin in Parallel control mode.
When this pin is changed to "H", soft mute cycle is initiated. When it is returning to "L", the
output mute is released.
12
CAD1
I Chip Address 0 Pin in I C Bus or 3-wire serial control mode
Hi-Z
DCHAIN
I Daisy Chain Mode select pin in Parallel control mode.
13
SDA
I/O Control Data Pin in I2C Bus serial control mode
Hi-Z
CDTI
I Control Data Input Pin in 3-wire serial control mode
TDM0
I TDM Mode select pin in Parallel control mode.
14
SCL
I Control Data Clock Pin in I2C Bus serial control mode
Hi-Z
CCLK
I Control Data Clock Pin in 3-wire serial control mode
TDM1
I TDM Mode select pin in Parallel control mode.
[AK4458]
014011794-E-00
2015/01
- 7 -
5. Pin Configurations and Functions
Ordering Guide
AK4458VN
40 +105 C (Exposed pad is connected to ground)
40 +85 C (Exposed pad is open)
48-pin QFN (0.5mm pitch)
AKD4458 Evaluation Board for AK4458
Pin Configurations
Note 1. The exposed pad at back face of the package must be open or connected to the ground of the board.
Before Servicing
This Unit
Electrical
Mechanical
Repair Information
Updating
27
