Copyright © 2009 Marvell
Doc. No. MV-S105540-00, Rev. --
March 4, 2009, Advance
Document Classification: Proprietary Information
Page 29
Signal Description
Pin Description
K3
28
36
RESETn
I
Hardware reset. Active low. XTAL1 must be
active for a minimum of 10 clock cycles
before the rising edge of RESETn. RESETn
must be pulled high for normal operation.
L4
27
37
COMA
I
COMA disables all active circuitry to draw
absolute minimum power. The COMA power
mode can be activated by asserting high on
the COMA pin. To deactivate the COMA
power mode, tie the COMA pin low. Upon
deactivating COMA mode, the 88E1111
device will continue normal operation.
The COMA power mode cannot be enabled
as long as hardware reset is enabled.
In COMA mode, the PHY cannot wake up on
its own by detecting activity on the CAT 5
cable.
Table 12:
Clock/Configuration/Reset/I/O (Continued)
117-TFBGA
Pin #
96-BCC
Pin #
128-PQFP
Pin #
Pin Name
Pin
Type
Description