Appendix D – GTXI Buffer Board
161
DMA Channels
The available DMA channels in PC-AT are 0,1,2,3,5,6, and 7. Some
of these channels can be assigned to the GTXI by writing to the
DMR in the GTXI buffer.
DMA Mask Register (DMR)
Internal address (IA) is 5.
Bit #
15-8 7-5 4 3-0
Function U DE7-DE5
U
DE3-DE0
Table D-10: DMA Mask Register Bit Functions
U
Unused
DExx
DMA Channel Enable. ‘0’ – DMA disabled. ‘1’ – DMA
enabled. See table below for bit assignments.
The default value for bits 15-0 is 0000h (all disabled).
The following table describes the DMA channels and their
corresponding bits in the DMR register:
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