MAX32600 User’s Guide
Analog Front End
8.3 ADC
Burst/Decimation Mode
PGA Bypass
pga
_
trk
_
cnt
=
f
target
2
adc
_
brst
_
cnt
×
f
PCLK
−
adc
_
acq
_
cnt
−
7
f
S
=
2
adc
_
brst
_
cnt
×
(
pga
_
trk
_
cnt
+
adc
_
acq
_
cnt
+
7
)
×
f
PCLK
PGA Enabled
pga
_
trk
_
cnt
=
f
target
(
f
PCLK
×
N
scan
)
−
pga
_
acq
_
cnt
−
adc
_
acq
_
cnt
−
8
f
S
=
N
scan
×
(
pga
_
trk
_
cnt
+
pga
_
acq
_
cnt
+
adc
_
acq
_
cnt
+
8
)
×
f
PCLK
Scan Mode
PGA Bypass
pga
_
trk
_
cnt
=
f
target
f
PCLK
×
N
scan
−
adc
_
acq
_
cnt
−
7
f
S
= (
N
scan
)(
pga
_
trk
_
cnt
+
adc
_
acq
_
cnt
+
7
)(
f
PCLK
)
PGA Enabled
pga
_
trk
_
cnt
=
f
target
(
f
PCLK
×
N
scan
)
−
pga
_
acq
_
cnt
−
adc
_
acq
_
cnt
−
8
f
S
=
N
scan
×
(
pga
_
trk
_
cnt
+
pga
_
acq
_
cnt
+
adc
_
acq
_
cnt
+
8
)
×
f
PCLK
Scan Mode with Burst/Decimation
PGA Bypass
pga
_
trk
_
cnt
=
f
target
(
f
PCLK
×
N
scan
×
2
adc
_
brst
_
cnt
)
−
adc
_
acq
_
cnt
−
7
f
S
=
N
scan
×
2
adc
_
brst
_
cnt
×
(
pga
_
trk
_
cnt
+
adc
_
acq
_
cnt
+
7
)
×
f
PCLK
PGA Enabled
pga
_
trk
_
cnt
=
f
target
(
f
PCLK
×
N
scan
×
2
adc
_
brst
_
cnt
)
−
pga
_
acq
_
cnt
−
adc
_
acq
_
cnt
−
8
f
S
=
N
scan
×
2
adc
_
brst
_
cnt
×
(
pga
_
trk
_
cnt
+
pga
_
acq
_
cnt
+
adc
_
acq
_
cnt
+
8
)
×
f
PCLK
Rev.1.3 April 2015
Maxim Integrated
Page 420