16
Chapter 3
Functional Details
PCI-DAS1602/12 block diagram
The PCI-DAS1602/12 provides the following features:
16 single-ended or eight fully differential 16-bit analog inputs
Two 12-bit analog outputs
24-bits, high current digital I/O
Three 16-bit down counters
PCI-DAS1602/12 functions are illustrated in the block diagram shown here.
FIRSTPORTA
C
o
n
tr
o
l
FIRSTPORTA (7:0)
Digital I/O
8
PCI
CONTROLLER
BADR1
BADR2
BADR3
BADR4
Interrupt
Boot
EEPROM
ADC
Pacer
Control
Scan
&
Burst
Logic
HS
DAC
Control
Trigger
Control
DAC Pacer
Control
Decode/Status
Int
Ctl
EXT
PCR
10 MHz
INT
XINT
Burst/Scan
XTRIG
CONTROLLER
FPGA
Analog
Trigger
Logic
TRIG_HI
Analog
Trigger
TRIG_LO
ADC
Pacer
CTR 2
CTR 1
Sample
Counter
CTR0
C
o
n
tr
o
l
Gain and Offset Autocal
INT
Mux
&
Gain
Analog In
16 CH S.E.
8 CH DIFF.
1024 x 12
FIFO
Gain and Offset Autocal
DAC
Data
Control
D/A 0
D/A 1
1024 x 12
FIFO
DAC
Pacer
CTR2
CTR1
ADC
Index
Counter
User
CTR 0
C
o
n
tr
o
l
Time Base
GATE
CLK
OUT
INT
XTRIG
12-Bit, 330 KHz
Start EOC
DAC0
DAC1
12-Bit, 250 KHz
12-Bit, 250 KHz
INT
10 MHz
LOCAL BUS
PCI BUS (5V, 32-BIT, 33MHZ)
FIRSTPORTB (7:0)
FIRSTPORTCH (3:0)
FIRSTPORTB
FIRSTPORTCH
INT
FIRSTPORTCL
FIRSTPORTCL (3:0)
Gains = 1, 2, 4, 8
Burst/Scan
Bus
Timing
Figure 3. PCI-DAS1602/12 functional block diagram
Summary of Contents for PCI-DAS1602
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