PCI-DAS1602/12 User's Guide
Specifications
22
Accuracy
330 kHz sampling rate, single channel operation and a 60-minute warm-up. Accuracies are listed for
operational temperatures within ±2 ºC of internal calibration temperature.
Calibrator test source high side tied
to Channel 0 High, and low side tied to Channel 0 Low. Low-level ground is tied to Channel 0 Low at the user
connector.
Table 2. Absolute accuracy specifications
Range
Absolute Accuracy (LSB)
Absolute Accuracy (mV)
±10 V
±2.5 LSB
±12.2
±5 V
±2.5 LSB
±6.10
±2.5 V
±2.5 LSB
±3.05
±1.25 V
±2.5 LSB
±1.53
0 V to +10 V
±2.5 LSB
±6.10
0 V to +5 V
±2.5 LSB
±3.05
0 V to +2.5 V
±2.5 LSB
±1.53
0 V to +1.25 V
±2.5 LSB
±0.76
Table 3. Accuracy components (errors in LSBs)
Range
Gain Error
Offset Error
DLE
ILE
±10 V
±1.0 max
±1.0 max
±0.75 max
±1.5 max
±5 V
±1.0 max
±1.0 max
±0.75 max
±1.5 max
±2.5 V
±1.0 max
±1.0 max
±0.75 max
±1.5 max
±1.25 V
±1.0 max
±1.0 max
±0.75 max
±1.5 max
0 to +10 V
±1.0 max
±1.0 max
±0.75 max
±1.5 max
0 to +5 V
±1.0 max
±1.0 max
±0.75 max
±1.5 max
0 to +2.5 V
±1.0 max
±1.0 max
±0.75 max
±1.5 max
0 to +1.25 V
±1.0 max
±1.0 max
±0.75 max
±1.5 max
Each PCI-DAS1602/12 is tested at the factory to assure the board’s overall error does not exceed accuracy
limits described in Table 2.
As shown in Table 3, total board error is a combination of gain, offset, differential linearity error (DLE) and
integral linearity error (ILE). The theoretical worst-case error of the board may be calculated by summing these
component errors. Worst case errors are realized only in the unlikely event that each of the component errors is
at their maximum level, and causing error in the same direction.
Table 4. Analog input drift specifications
ADC full-scale gain drift
±6 ppm/°C
ADC zero drift
±6 ppm/°C
No missing codes guaranteed
12 bits
Common mode range
±10 V
CMRR @ 60 Hz
-70 dB typ
Input impedance
10 MOhm min
Input leakage current
200 nA max
Absolute maximum input voltage
±35 V power on or off
Warm-up time
60 minutes
Summary of Contents for PCI-DAS1602
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