MeiG
Product
Manual
of
SLM750
Module
SLM750
Module
Hardware
Design
Page 50, total 84 pages
Figure 21 Reference circuit of STATUS
3.15 ADC Function
SLM750 provides two analogy- to-digital converters. Using AT+ADCREAD=1 to read the
voltage value of ADC0. Using AT+ADCREAD=6 read the voltage value of ADC1.
Table 18: ADC pin description
Pin name
Pin no.
Description
Voltage range
Resolution
ADC0
45
Analogy to digital
converter interface 0
0.05 – 1.8V
15bits
ADC1
44
Analogy to digital
converter interface 1
0.05 – 1.8V
15bits
NOTES: 1. The ADC interface cannot directly connect to any input voltage when the module is
not powered by VBAT.
2. It is recommended that the ADC pin adopt the input of the voltage divider circuit.
3.16 SGMII Interface
SLM750 includes an integrated Ethernet MAC with an SGMII interface and two management
interfaces
(
MDIO
)
, key features of the SGMII interface are shown below:
IEEE802.3 compliance
Full duplex at 1000Mbps
Half/full duplex for 10/100Mbps
Support VLAN tagging
Support IEEE1588 and Precision Time Protocol (PTP)
Can be used to connect to external Ethernet PHY like AR8033, or to an external switch
MDIO supports dual voltage 1.8V/2.85V
Pin definitions of SGMII interface are as bellow:
Table 19: Pin definition of SGMII interface
Pin name
Pin no.
I/O Description
Comment
EPHY_RST_N 119
DO
Ethernet
PHY
reset
1.8V /2.85V power domain.