Micrel KSZ8692, Programmer'S Manual

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 (408)944-0800 

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http://www.micrel.com

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 2008 Micrel Semiconductor

Micrel KSZ8692 SPI Controller 

Programmer’s Guide 

3  Micrel KS8995M Switch 

 
The Micrel KS8995M switch can be configured through the SPI interface

1

. It uses 1 byte of 

address offset and 16-bit data per transfer.  
 
The following examples shows how to read/write data from/to KS8995M switch register offset 
(1-byte) under U-boot 1.1.4 “sspi” command. KS8692 SPI controller is configured as 16-bit data 
per transfer, and SPI mode 0. 

3.1  Read/Write 1-byte From SPI device 

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  Write 1-byte data ‘0x12’ to address offset 0x68 

 
boot > sspi 0 8 026812 
spi_reset: spi_ctr 1FFFE900:80000000 
spi_init: spi_csr 1FFFE91C:18880101 
spi_ks_chipsel: spi_ctr 1FFFE900:40000000 
spi_write_word: regOffset=68, length=1 
spi_write_word: spi_tdr 1FFFE908:02680800 
spi_write_word: spi_tdr 1FFFE908:12000800 
spi_ks_chipsel: spi_ctr 1FFFE900:00000000 
 

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  Write 1-byte data ‘0x34’ to address offset 0x69 

 
boot > sspi 0 8 026934 
spi_reset: spi_ctr 1FFFE900:80000000 
spi_init: spi_csr 1FFFE91C:18880101 
spi_ks_chipsel: spi_ctr 1FFFE900:40000000 
spi_write_word: regOffset=69, length=1 
spi_write_word: spi_tdr 1FFFE908:02690800 
spi_write_word: spi_tdr 1FFFE908:34340800 
spi_ks_chipsel: spi_ctr 1FFFE900:00000000 

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  Read 1-byte data from dress offset 0x68 

boot > sspi 0 8 0368 
spi_reset: spi_ctr 1FFFE900:80000000 
spi_init: spi_csr 1FFFE91C:18880101 
spi_ks_chipsel: spi_ctr 1FFFE900:40000000 
spi_read_word: regOffset=68, length=1 

1

 Set KS8995 SPI to slave mode when access from KS8692 SPI controller.