Micrel SY87725L Manual Download

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Micrel, Inc.

SY87725L Evaluation Board

July 2008

M9999-071108-B

hbwhelp@micrel.com

or (408) 955-1690

Remote Loopback Data

This is the most basic test mode. It loops back the data
from SIN to SOUT and is used to verify the connections to

SIN and SOUT as well as the power supply connections
to the evaluation board. The SOUT output can be
monitored with a scope or a serial BERT.

Figure 1. Switch Settings for Remote Loopback Data

Switch Settings

Function

TESTb = 1

Disables factory test mode
(enables normal operation)

XMT_CTRL0/1 = 00

Selects the remote loopback
mode so SDOUT = SDIN

Table 2. Required Switch Settings for

Remote Loopback Data Flow

Summary of Contents for SY87725L

Page 1: ...ation board is optimized to interface directly to 50 test equipment since the evaluation board is configured with AC coupled inputs and AC coupled outputs All datasheets and support documentation can...

Page 2: ...nnect the VCC terminal to the positive side of a DC power supply 2 For a LVPECL input signal set VT to VCC 2 0V 3 Signal Generator Using a differential signal source set the amplitude of each side of...

Page 3: ...Micrel Inc SY87725L Evaluation Board July 2008 3 M9999 071108 B hbwhelp micrel com or 408 955 1690 Evaluation Board Schematic...

Page 4: ...not used in that mode The diagram to the left of the table shows the actual dip switch settings as they would appear on the evaluation board The dip switches are configured with a pull up resistor on...

Page 5: ...e connections to SIN and SOUT as well as the power supply connections to the evaluation board The SOUT output can be monitored with a scope or a serial BERT Figure 1 Switch Settings for Remote Loopbac...

Page 6: ...clock coming out of SOUT will be synchronous with the RefClk source Figure 2 Switch Settings for Remote Loopback Recovered Clock Switch Settings Function RCV_FSEL0 1 11 Sets receive CDR frequency to...

Page 7: ...CDR operation can be verified with a serial BERT Figure 3 Switch Settings for Remote Loopback Recovered Data Switch Settings Function RCV_FSEL0 1 11 Sets receive CDR frequency to 2 48832Gbps For othe...

Page 8: ...Data In SIN For example if REFCLK is 155 52MHz then SIN must be at 155 52Mbps The 4 bit parallel data at the output of DOUT0 3 can be verified with a parallel BERT Figure 4 Switch Settings for CDR Byp...

Page 9: ...3 outputs The CLKIN is multiplied by 4 up to the serial rate by the synthesizer clock multiplier This allows a parallel BERT to be used to verify the Mux and DeMux operation independent of the CDR Fig...

Page 10: ...Switch Settings Function RCV_DDRSEL 0 Sets Clkout at parallel data rate RCV_CTRL0 1 11 Selects the normal receive data path RCV_FSEL0 1 11 Sets receive CDR frequency to 2 48832Gbps For other frequenc...

Page 11: ...0F Vishay 1 0W resistor size 0402 1 R1 R2 R15 R17 R19 R27 R29 R72 CRCW04021270F Vishay 1 127W 1 resistor size 0402 8 R3 R4 R16 R18 R20 R28 R30 R31 CRCW040282R5F Vishay 1 82 5W resistor size 0402 8 R9...

Page 12: ...Micrel Inc SY87725L Evaluation Board July 2008 12 M9999 071108 B hbwhelp micrel com or 408 955 1690 APPENDIX TEST FLOW DIAGRAM FOR SY87725L EVALUATION BOARD...

Page 13: ...Micrel Inc SY87725L Evaluation Board July 2008 13 M9999 071108 B hbwhelp micrel com or 408 955 1690 APPENDIX TEST FLOW DIAGRAM FOR SY87725L CONTINUED...

Page 14: ...is data sheet is believed to be accurate and reliable However no responsibility is assumed by Micrel for its use Micrel reserves the right to change circuitry and specifications at any time without no...