Board Configuration
2015 Microchip Technology Inc.
DS50002403A-page 17
3.2.1.2
EEPROM CONFIGURATION
EEPROM_size_strap (J6 & J9): This strap determines the EEPROM size range.
A low selects 1K bits (128 x 8) through 16K bits (2K x 8)_24C16.
A high selects 32K bits (4K x 8) through 512K bits (64K x 8) or 4Mbits (512K x
8)_24C512.
3.2.1.3
TX SHIFT STRAP
EtherCAT MII Port TX Timing Shift Strap is used to configure default value of EtherCAT
MII Port TX Timing Shift Strap “TX_SHIFT[1:0]”. These straps determine the value of
the MII TX Timing Shift for the MII.
3.2.1.4
COPPER AND FIBER STRAPS
The LAN9252 supports 100BASE-TX (Copper) and 100BASE-FX (Fiber) modes. In
100BASE-FX operation, the presence of the receive signal is indicated by the external
transceiver as either an open-drain, CMOS level, Loss of Signal (SFP) or a LVPECL
Signal Detect (SFF).
This EVB supports 100BASE-TX (Copper) and SFP 100BASE-FX (Fiber) modes. By
default Copper Mode is active. Fiber Mode is supported as an assembly option. To
select the Copper or Fiber Mode, the respective strap and signal routing resister
assembly options must to be configured.
TABLE 3-2:
EEPROM SIZE CONFIGURATION
Header
Pin Settings
eeprom_size_strap Value
Description
J6 & J9
1-2 (Default)
1
EEPROM size = 32K bits (4K x
8) through 4Mbits (512K x 8).
J6 & J9
2-3
0
EEPROM size = 1K bits (128 x
8) through 16K bits (2K x 8).
TABLE 3-3:
ETHERCAT MII PORT TX TIMING SHIFT STRAP OPTIONS
TX_SHIFT 1
TX_SHIFT 0
TX Timing Shift (ns)
0
0
20
0
1
30 (Default)
1
0
0
1
1
10
TABLE 3-4:
MII TX TIMING SHIFT CONFIGURATIONS
Switch
Short Pins
TX_SHIFT[1:0]
Switch KNOB Position
SW9
1-2
01
DOWN
SW10
1-3
UP
Note:
For switch P/N: 450301014042, pin 1 is at the middle of the switch. To short
1-2, knob position must be in the 1-3 position, and vice versa.
Note:
Vendor part number for SFP: Finisar/FTLF1217P2
