PIC16C62B/72A
1998-2013 Microchip Technology Inc.
Preliminary
DS35008C-page 59
10.4
Power-On Reset (POR)
A Power-on Reset pulse is generated on-chip when
V
DD
rise is detected (in the range of 1.5V - 2.1V). To
take advantage of the POR, just tie the MCLR pin
directly (or through a resistor) to V
DD
. This will elimi-
nate external RC components usually needed to create
a Power-on Reset. A maximum rise time for V
DD
is
specified (SV
DD
, parameter D004). For a slow rise
time, see Figure 10-6.
When the device starts normal operation (exits the
reset condition), device operating parameters (voltage,
frequency, temperature,...) must be met to ensure oper-
ation. If these conditions are not met, the device must
be held in reset until the operating conditions are met.
Brown-out Reset may be used to meet the start-up con-
ditions.
FIGURE 10-6: EXTERNAL POWER-ON
RESET CIRCUIT (FOR SLOW
V
DD
POWER-UP)
10.5
Power-up Timer (PWRT)
The Power-up Timer provides a fixed nominal time-out
(T
PWRT
, parameter #33) from the POR. The Power-up
Timer operates on an internal RC oscillator. The chip is
kept in reset as long as the PWRT is active. The
PWRT’s time delay allows V
DD
to rise to an acceptable
level. A configuration bit is provided to enable/disable
the PWRT.
The power-up time delay will vary from chip-to-chip due
to V
DD
, temperature and process variation. See DC
parameters for details.
10.6
Oscillator Start-up Timer (OST)
The Oscillator Start-up Timer (OST) provides a delay of
1024 oscillator cycles (from OSC1 input) after the
PWRT delay is over (T
OST
, parameter #32). This
ensures that the crystal oscillator or resonator has
started and stabilized.
The OST time-out is invoked only for XT, LP and HS
modes and only on Power-on Reset or wake-up from
SLEEP.
10.7
Brown-Out Reset (BOR)
The configuration bit, BODEN, can enable or disable
the Brown-Out Reset circuit. If V
PP
falls below Vbor
(parameter #35, about 100
S), the brown-out situation
will reset the device. If V
DD
falls below V
BOR
for less
than T
BOR
, a reset may not occur.
Once the brown-out occurs, the device will remain in
brown-out reset until V
DD
rises above V
BOR
. The
power-up timer then keeps the device in reset for
T
PWRT
(parameter #33, about 72mS). If V
DD
should fall
below V
BOR
during T
PWRT
, the brown-out reset pro-
cess will restart when V
DD
rises above V
BOR
with the
power-up timer reset. The power-up timer is always
enabled when the brown-out reset circuit is enabled,
regardless of the state of the PWRT configuration bit.
Note 1:
External Power-on Reset circuit is required
only if V
DD
power-up slope is too slow. The
diode D helps discharge the capacitor
quickly when V
DD
powers down.
2:
R < 40 k
is recommended to make sure
that voltage drop across R does not violate
the device’s electrical specification.
3:
R1 = 100
to 1 k
will limit any current
flowing into MCLR from external capacitor
C in the event of MCLR/V
PP
pin break-
down due to Electrostatic Discharge
(ESD) or Electrical Overstress (EOS).
C
R1
R
D
V
DD
MCLR
PIC16CXX
Note:
The OST delay may not occur when the
device wakes from SLEEP.
Summary of Contents for PIC16C62B/72A
Page 4: ...PIC16C62B 72A DS35008C page 4 Preliminary 1998 2013 Microchip Technology Inc NOTES...
Page 30: ...PIC16C62B 72A DS35008C page 30 Preliminary 1998 2013 Microchip Technology Inc NOTES...
Page 38: ...PIC16C62B 72A DS35008C page 38 Preliminary 1998 2013 Microchip Technology Inc NOTES...
Page 48: ...PIC16C62B 72A DS35008C page 48 Preliminary 1998 2013 Microchip Technology Inc NOTES...
Page 80: ...PIC16C62B 72A DS35008C page 80 Preliminary 1998 2013 Microchip Technology Inc NOTES...
Page 104: ...PIC16C62B 72A DS35008C page 104 Preliminary 1998 2013 Microchip Technology Inc NOTES...
Page 110: ...PIC16C62B 72A DS35008C page 110 Preliminary 1998 2013 Microchip Technology Inc NOTES...
Page 120: ...PIC16C62B 72A DS35008C page 120 Preliminary 1913 Microchip Technology Inc...
