PIC16F87XA
DS39582B-page 182
2003 Microchip Technology Inc.
FIGURE 17-4:
EXTERNAL CLOCK TIMING
OSC1
CLKO
Q4
Q1
Q2
Q3
Q4
Q1
1
2
3
3
4
4
TABLE 17-3:
EXTERNAL CLOCK TIMING REQUIREMENTS
Param
No.
Symbol
Characteristic
Min
Typ†
Max
Units
Conditions
F
OSC
External CLKI Frequency
(Note 1)
DC
—
1
MHz
XT and RC Osc mode
DC
—
20
MHz
HS Osc mode
DC
—
32
kHz
LP Osc mode
Oscillator Frequency
(Note 1)
DC
—
4
MHz
RC Osc mode
0.1
—
4
MHz
XT Osc mode
4
5
—
—
20
200
MHz
kHz
HS Osc mode
LP Osc mode
1
T
OSC
External CLKI Period
(Note 1)
1000
—
—
ns
XT and RC Osc mode
50
—
—
ns
HS Osc mode
5
—
—
µ
s
LP Osc mode
Oscillator Period
(Note 1)
250
—
—
ns
RC Osc mode
250
—
1
µ
s
XT Osc mode
100
—
250
ns
HS Osc mode
50
—
250
ns
HS Osc mode
31.25
—
—
µ
s
LP Osc mode
2
T
CY
Instruction Cycle Time
(Note 1)
200
T
CY
DC
ns
T
CY
= 4/F
OSC
3
T
OS
L,
T
OS
H
External Clock in (OSC1) High or
Low Time
100 —
—
ns
XT
oscillator
2.5
—
—
µ
s
LP oscillator
15
—
—
ns
HS oscillator
4
T
OS
R,
T
OS
F
External Clock in (OSC1) Rise or
Fall Time
— —
25
ns
XT
oscillator
— —
50
ns
LP
oscillator
—
—
15
ns
HS oscillator
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1:
Instruction cycle period (T
CY
) equals four times the input oscillator time base period. All specified values are
based on characterization data for that particular oscillator type, under standard operating conditions, with
the device executing code. Exceeding these specified limits may result in an unstable oscillator operation
and/or higher than expected current consumption. All devices are tested to operate at “min.” values with an
external clock applied to the OSC1/CLKI pin. When an external clock input is used, the “max.” cycle time
limit is “DC” (no clock) for all devices.
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