PIC16F87XA
DS39582B-page 186
2003 Microchip Technology Inc.
FIGURE 17-9:
CAPTURE/COMPARE/PWM TIMINGS (CCP1 AND CCP2)
TABLE 17-7:
CAPTURE/COMPARE/PWM REQUIREMENTS (CCP1 AND CCP2)
Note: Refer to Figure 17-3 for load conditions.
and RC2/CCP1
(Capture Mode)
50
51
52
53
54
RC1/T1OSI/CCP2
and RC2/CCP1
(Compare or PWM Mode)
RC1/T1OSI/CCP2
Param
No.
Symbol
Characteristic
Min
Typ† Max Units
Conditions
50*
T
CC
L
CCP1 and CCP2
Input Low Time
No Prescaler
0.5 T
CY
+ 20
—
—
ns
With Prescaler
Standard(F)
10
—
—
ns
Extended(LF)
20
—
—
ns
51*
T
CC
H
CCP1 and CCP2
Input High Time
No Prescaler
0.5 T
CY
+ 20
—
—
ns
With Prescaler
Standard(F)
10
—
—
ns
Extended(LF)
20
—
—
ns
52*
T
CC
P
CCP1 and CCP2 Input Period
3 T
CY
+ 40
N
—
—
ns
N = prescale value
(1, 4 or 16)
53*
T
CC
R
CCP1 and CCP2 Output Rise Time
Standard(F)
—
10
25
ns
Extended(LF)
—
25
50
ns
54*
T
CC
F
CCP1 and CCP2 Output Fall Time
Standard(F)
—
10
25
ns
Extended(LF)
—
25
45
ns
*
These parameters are characterized but not tested.
†
Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are
not tested.
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