2013 Microchip Technology Inc.
Advance Information
DS33030A-page 157
PIC24FV16KM204 FAMILY
REGISTER 13-7:
CCPxSTATL: CCPx STATUS REGISTER
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
—
bit 15
bit 8
R-0
W1-0
W1-0
R/C-0
R/C-0
R/C-0
R/C-0
R/C-0
CCPTRIG
TRSET
TRCLR
ASEVT
SCEVT
ICDIS
ICOV
ICBNE
bit 7
bit 0
Legend:
C = Clearable bit
R = Readable bit
W1 = Write ‘1’ only
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-8
Unimplemented:
Read as ‘
0
’
bit 7
CCPTRIG:
CCPx Trigger Status bit
1
= Timer has been triggered and is running
0
= Timer has not been triggered and is held in Reset
bit 6
TRSET:
CCPx Trigger Set Request bit
Write ‘
1
’ to this location to trigger the timer when TRIGEN =
1
(location always reads as ‘
0
’).
bit 5
TRCLR:
CCPx Trigger Clear Request bit
Write ‘
1
’ to this location to cancel the timer Trigger when TRIGEN =
1
(location always reads as ‘
0
’).
bit 4
ASEVT:
CCPx Auto-Shutdown Event Status/Control bit
1
= A shutdown event is in progress; CCPx outputs are in the shutdown state
0
= CCPx outputs operate normally
bit 3
SCEVT:
Single Edge Compare Event Status bit
1
= A single-edge compare event has occurred
0
= A single-edge compare event has not occurred
bit 2
ICDIS:
Input Capture Disable bit
1
= Event on Input Capture x pin (ICx) does not generate a capture event
0
= Event on Input Capture x pin will generate a capture event
bit 1
ICOV:
Input Capture Buffer Overflow Status bit
1
= The Input Capture FIFO buffer has overflowed
0
= The Input Capture FIFO buffer has not overflowed
bit 0
ICBNE:
Input Capture Buffer Status bit
1
= Input Capture buffer has data available
0
= Input Capture buffer is empty
Summary of Contents for PIC24FV16KM204 FAMILY
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