2-Port USB 2.0 Hi-Speed Hub Controller
Datasheet
2014 Microchip Technology Inc.
DS00001726A-page 45
6.2
External Clock
50% Duty cycle
±
10%, 24 MHz
±
350 ppm.
The external clock is recommended to conform to the signaling level designated in the JESD76-2
specification on 1.2 V CMOS Logic.
XTALOUT
should be treated as a weak (< 1 mA) buffer output.
6.2.1
USB 2.0
The Microchip hub conforms to all voltage, power, and timing characteristics and specifications as set
forth in the
USB 2.0 Specification
. See the
USB Specification
for more information.
6.3
SMBus Interface
The Microchip hub conforms to all voltage, power, and timing characteristics and specifications as set
forth in the
SMBus 1.0 Specification
for slave-only devices (except as noted in
).
