Component Descriptions and Connections
UG0209 User Guide Revision 7.1
20
The following figure shows the UART0 port.
Figure 19 •
UART Port 0.
5.12
Ethernet Interface
One Ethernet interface, configured for RMII Full Duplex mode, and a low-power 10/100 Mbps single-port
ethernet physical layer transceiver (U19) are provided on-board (
page 21). The Ethernet
physical layer features integrated sub-layers to support both 10BASE-T and 100BASE-TX Ethernet
protocols. These sub-layers ensure compatibility and interoperability with many other standards-based
Ethernet solutions.
The Ethernet RJ45 interface and physical layer interface with the SmartFusion MSS Ethernet media
access controller (MAC), which supports RMII, serve many purposes. For example, these interfaces can
be used to access the SmartFusion cSoC to monitor the ADC data over a network. The embedded
system memory and control registers can be accessed and processed remotely to support system
management.
5.12.1
Clocking Scheme for RMII CLK
The 10/100 MAC RMII interface requires a 50 MHz clock. The PHY device also requires a 50 MHz
20 PPM clock for proper operation. While there are several possible ways of providing the clock, the
following clocking scheme are tested on the board.
•
The 20 MHz oscillator feeds the CCC input. The CCC and GLC outputs are configured as 50 MHz
•
The GLC feeds the MAC_CLK (pin T6) input of the 10/100 MAC peripheral of the SmartFusion MSS
•
The same GLC is routed through the fabric and feeds the X1 input of the Ethernet PHY device on
the board
Figure 20 •
Ethernet Clocking Scheme
RXD_0_IN
TXD_0_OUT
UART_0_TXD/GPIO_20
Y22
UART_0_RXD/GPIO_21
U18
UART INTERFACE
PORT0
U64-9
A2F200M3F-FGG484
UART INTERFACE
PORT0
U64-9
A2F200M3F-FGG484
R236
39R-0603
R236
39R-0603
A2F200
CCC
20 MHz
Oscillator
10/100 MAC
MAC_CLK
GLC
Ethernet
PHY
X1 Input
50 MHz
Clock Output
TXD
RXD
50 MHz
