Peripherals 6
miriac SBC-LS1043A2 User Manual
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© MicroSys Electronics GmbH 2017
88E1512P
ST4
LS1043A
Pin
Name
Pin
Signal
Pin
Name
1
S_INP
←
T41
SRD-TX3+
←
AD10
SD1-TX1
2
S_INN
←
T42
SRD-TX3-
←
AE10
SD1-TX1#
4
S_OUTP
→
T38
SRD-RX3+
→
AG10
SD1-RX1
5
S_OUTN
→
T39
SRD-RX3-
→
AH10
SD1-RX1#
Table 6-5 SerDes 3 pin assignment
6.3.4 Port 4
Port 4 is connected to a standard RJ-
45 socket “LAN2”. It uses the Ethernet
controller EC1 as RGMII port provided by the LS1043A CPU. The RGMII lanes
connect to a Marvell PHY 88E1512P which uses a copy of the reference voltage on
pin T80 of the module connector ST4 as I/O voltage (1.8V).
The following table shows the internal connections for Port 4.
I/O
Range
88E1512P
ST4
LS1043A
Pull-
up
Pull-
down
Pin
Name
Pin
Signal
Pin
Name
1.8V
46
RX_CLK
→
T86
MII1-
RXCK
→
W1
MII_RX_CLK
1.8V
43
RX_CTRL
→
T95
MII1-
RXDV
→ AB1
MII_RX_DV
1.8V
44
RXD0
→
T88
MII1-
RXD0
→ AA2
MII_RXD0
1.8V
4k7
45
RXD1
→
T89
MII1-
RXD1
→ AA1
MII_RXD1
1.8V
47
RXD2
→
T91
MII1-
RXD2
→
Y1
MII_RXD2
1.8V
48
RXD3
→
T92
MII1-
RXD3
→
W2
MII_RXD3
1.8V
53
TX_CLK
←
T94
MII1-
TXCK
←
W4
MII_TX_CLK
1.8V
50
TXD0
←
T97
MII1-
TXD0
← AB3
MII_TXD0
1.8V
51
TXD1
←
T98
MII1-
TXD1
← AA3
MII_TXD1
1.8V
54
TXD2
←
T100
MII1-
TXD2
←
Y4
MII_TXD2
1.8V
55
TXD3
←
T101
MII1-
TXD3
←
Y3
MII_TXD3
1.8V
4k7
56
TX_CTRL
←
T103
MII1-
TXEN
← AB4
MII_TXEN
1.8V
5k0
8
MDIO
↔
B87
MII1-
MDIO
↔ AF2
EMI1_MDIO
1.8V
10k0
7
MDC
←
B86
MII1-
MDC
← AG2
EMI1_MDC
1.8V
9
CLK125
→
T83
MII1-
CRS
→ AC3
EC1_GTX_CLK125
Table 6-6 Port4 pin assignment
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