System Core, Boot Configuration and On-Board Memory 5
miriac SBC-T1024 User Manual
V 2.3
33/70
© MicroSys Electronics GmbH 2017
The following graphic shows the I²C multiplexer’s channels:
The I²C bus 2 has the following layout:
I/O Range: LVTTL
Device
SCL
(Signal Name)
Pin
SDA
(Signal Name)
Pin
T1024
IIC2_SCL
V3
IIC2_SDA
Y3
↓
↕
Module Connector
I2C2_SCL
B75
I2C2_SDA
B74
↓
↕
TCA9544APWR
SCK
7
SDA
8
↓
↕
SC18IS602BIPW
SCL
8
SDA
7
↓
↕
MAX9611AUB
SCL
6
SDA
7
Table 5-10 I²C-2 pin assignment
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