9.3 Reading Device Data from Other CPUs
9-19
9
M
U
LT
IP
LE
CP
U HI
GH
SP
EED
T
R
A
N
S
MIS
S
IO
N
DE
DI
CA
TE
D IN
ST
R
UCT
IO
NS
D_DDRD
D_DDRD
Program
E
xamp
l
e
In the following program, 10 words of data from D0 in the CPU No. 2 are read and stored to W10
and the following devices in the host CPU when X0 turns ON.
[Structured ladder]
[ST]
IF X0=TRUE THEN
D101:=10;
D_DDRD(TRUE,H3E1,D100,D0,W10,M100);
END_IF;
IF M100=TRUE THEN
IF M101=FALSE THEN
Y10:=TRUE;
ELSE
Y11:=TRUE;
END_IF;
END_IF;
Caution
(1) The digit specification for bit devices can be set for n,
and
. However, the following
conditions need to be satisfied when the digit specification for bit devices is set for
and
.
• Digit specification for bit devices (K4/16 bits)
• The start number of bit device is a multiple of 16 (10
H
).
(2) Execute this instruction as the read target CPU is powered ON.
If the read target CPU is not powered ON and this instruction is executed, the instruction is
not processed.
(3) After the execution of this instruction, data stored by the system (completion status,
completion device) cannot be stored normally, if the range of the device specified for the
setting data is changed before the completion device turns ON.
The number of read data '10' is stored to
the read data points storing device of
control data D101 ( +1).
Data from D0 to D9 in the CPU No. 2 are
stored to W10 to W19 in the host CPU.
s2
d1
s2
d1
Summary of Contents for MELSEC Q Series
Page 1: ...Structured Programming Manual Mitsubishi Programmable Controller QCPU Common Instructions ...
Page 2: ......
Page 14: ...A 12 MEMO ...
Page 340: ...6 178 MEMO MTR ...
Page 708: ...7 368 MEMO ...
Page 776: ...8 68 MEMO ...
Page 796: ...9 20 MEMO ...
Page 804: ...App 8 MEMO ...
Page 812: ...Index 8 MEMO ...
Page 815: ......