Y Data Memory Space
3
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DSP56303 User’s Manual
3.2.3
Internal I/O Space—X Data Memory
One part of the on-chip peripheral registers and some of the DSP56303 core registers occupy
the top 128 locations of the X data memory ($FFFF80–$FFFFFF). This area is referred to as
the internal X I/O space and it can be accessed by MOVE, MOVEP instructions and by
bit-oriented instructions (BCHG, BCLR, BSET, BTST, BRCLR, BRSET, BSCLR, BSSET,
JCLR, JSET, JSCLR and JSSET). The contents of the internal X I/O memory space are listed
in Appendix A.
3.3
Y Data Memory Space
The Y data memory space consists of the following:
■
Internal Y data memory (2 K by default up to 3 K)
■
External I/O space (upper 128 locations)
■
Optional off-chip memory expansion (up to 64 K in 16-bit mode, or 256 K in 24-bit
mode using the 18 external address lines, or 4 M using the external address lines and
the four address attribute lines). Refer to the DSP56300 Family Manual, especially
Chapter 9, External Memory Interface (Port A), for details on using the external
memory interface to access external Y data memory.
Note:
The Y memory space at $FF0000–$FFEFFF is reserved and should not be
accessed.
3.3.1
Internal Y Data Memory
The default on-chip Y data RAM is a 24-bit-wide, internal, static memory occupying the
lowest 2 K ($000–$7FF) of Y memory space. The on-chip Y data RAM is organized into 8
banks with 256 locations each. Available Y data memory space is increased by 1 K through
reallocation of program memory using the memory switch mode described in the next section.
3.3.2
Memory Switch Modes—Y Data Memory
Memory switch mode reallocates of portions of program RAM to X and Y data memory. Bit 7
in the OMR is the MS bit that controls this function, as follows:
■
When the MS bit is cleared, the Y data memory consists of the default 2 K
×
24-bit
memory space described in the previous section. In this default mode, the lowest
external Y data memory location is $800.
■
When the MS bit is set, a portion of the higher locations of the internal program
memory is switched to X and Y data memory. The Y data memory in this mode
consists of a 3 K
×
24-bit memory space. In this mode, the lowest external Y data
memory location is $C00.
Summary of Contents for DSP56303
Page 1: ...DSP56303 User s Manual 24 Bit Digital Signal Processor DSP56303UM AD Revision 1 January 2001 ...
Page 52: ...JTAG OnCE Interface 2 22 DSP56303 User s Manual ...
Page 114: ...General Purpose Input Output GPIO 5 10 DSP56303 User s Manual ...
Page 212: ...GPIO Signals and Registers 8 26 DSP56303 User s Manual ...
Page 268: ...Interrupt Equates A 22 DSP56303 User s Manual ...
Page 306: ...Programming Sheets B 38 DSP56303 User s Manual ...
Page 320: ...Index 14 DSP56303 User s Manual ...