Signal/Connection Descriptions
Parallel Host Interface (HDI08)
MOTOROLA
DSP56367
2-9
2.7
PARALLEL HOST INTERFACE (HDI08)
The HDI08 provides a fast, 8-bit, parallel data port that may be connected directly to the host
bus. The HDI08 supports a variety of standard buses and can be directly connected to a
number of industry standard microcomputers, microprocessors, DSPs, and DMA hardware.
MODC/IRQC
Input
Input
Mode Select C/External Interrupt Request C—MODC/IRQC is an active-low
Schmitt-trigger input, internally synchronized to the DSP clock. MODC/IRQC selects the
initial chip operating mode during hardware reset and becomes a level-sensitive or
negative-edge-triggered, maskable interrupt request input during normal instruction
processing. MODA, MODB, MODC, and MODD select one of 16 initial chip operating
modes, latched into OMR when the RESET signal is deasserted.
This input is 3.3V tolerant.
MODD/IRQD
Input
Input
Mode Select D/External Interrupt Request D—MODD/IRQD is an active-low
Schmitt-trigger input, internally synchronized to the DSP clock. MODD/IRQD selects the
initial chip operating mode during hardware reset and becomes a level-sensitive or
negative-edge-triggered, maskable interrupt request input during normal instruction
processing. MODA, MODB, MODC, and MODD select one of 16 initial chip operating
modes, latched into OMR when the RESET signal is deasserted.
This input is 3.3V tolerant.
RESET
Input
Input
Reset—RESET is an active-low, Schmitt-trigger input. When asserted, the chip is placed in
the Reset state and the internal phase generator is reset. The Schmitt-trigger input allows a
slowly rising input (such as a capacitor charging) to reset the chip reliably. When the
RESET signal is deasserted, the initial chip operating mode is latched from the MODA,
MODB, MODC, and MODD inputs. The RESET signal must be asserted during power up.
A stable EXTAL signal must be supplied while RESET is being asserted.
This input is 3.3V tolerant.
Table 2-8 Interrupt and Mode Control (Continued)
Signal Name
Type
State
during
Reset
Signal Description
Summary of Contents for DSP56367
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Page 148: ...4 6 DSP56367 MOTOROLA Design Considerations PLL Performance Issues ...
Page 248: ...9 30 DSP56367 MOTOROLA Serial Host Interface SHI Programming Considerations ...
Page 306: ...10 58 DSP56367 MOTOROLA Enhanced Serial Audio Interface ESAI ESAI Initialization Examples ...
Page 389: ...Bootstrap ROM Contents MOTOROLA DSP56367 A 15 end ...
Page 390: ...A 16 DSP56367 MOTOROLA Bootstrap ROM Contents ...
Page 432: ...C 8 DSP56367 MOTOROLA JTAG BSDL ...
Page 484: ...D 52 DSP56367 MOTOROLA Programmer s Reference ...
Page 490: ...E 6 DSP56367 MOTOROLA Power Consumption Benchmark ...
Page 516: ...F 26 DSP56367 MOTOROLA IBIS Model ...
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