INSTRUCTION FORMATS
6 - 14
INSTRUCTION SET INTRODUCTION
MOTOROLA
Some address register indirect modes require an offset and a modifier register for use in
address calculations. These registers are implied by the address register specified in an
effective address in the instruction word. Each offset register (Nn) and each modifier reg-
ister (Mn) is assigned to an address register (Rn) having the same register number (n).
Thus, the assigned register triplets are R0;N0;M0, R1;N1;M1, R2;N2;M2, R3;N3;M3,
R4;N4;M4, R5;N5;M5, R6;N6;M6, and R7;N7;M7. Rn is used as the address register; Nn
is used to specify an optional offset; and Mn is used to specify the type of arithmetic used
to update the Rn.
The addressing modes are grouped into three categories: register direct, address register
indirect, and special. These addressing modes are described in the following paragraphs.
Refer to Table 6-1 for a summary of the addressing modes and allowed operand
references.
6.3.5.1
Register Direct Modes
These effective addressing modes specify that the operand source or destination is one
of the data, control, or address registers in the programming model.
6.3.5.1.1
Data or Control Register Direct
The operand is in one, two, or three data ALU register(s) as specified in a portion of the
data bus movement field in the instruction. Classified as a register reference, this address-
ing mode is also used to specify a control register operand for special instructions such
as OR immediate to control registers (ORI) and AND immediate to control registers
(ANDI).
6.3.5.1.2
Address Register Direct
Classified as a register reference, the operand is in one of the 24 address registers (Rn,
Nn, or Mn) specified by an effective address in the instruction.
Note:
Due to instruction pipelining, if an address register (Mn, Nn, or Rn) is changed with
a MOVE instruction, the new contents will not be available for use as a pointer until the
second following instruction.
6.3.5.2
Address Register Indirect Modes
The address register indirect mode description is presented in SECTION 4 - ADDRESS
GENERATION UNIT.
Summary of Contents for DSP56K
Page 12: ...xii LIST of TABLES MOTOROLA List of Tables Continued Table Page Number Title Number ...
Page 13: ...MOTOROLA DSP56K FAMILY INTRODUCTION 1 1 SECTION 1 DSP56K FAMILY INTRODUCTION ...
Page 31: ...MOTOROLA DATA ARITHMETIC LOGIC UNIT 3 1 SECTION 3 DATA ARITHMETIC LOGIC UNIT ...
Page 50: ...DATA ALU SUMMARY 3 20 DATA ARITHMETIC LOGIC UNIT MOTOROLA ...
Page 51: ...MOTOROLA ADDRESS GENERATION UNIT 4 1 SECTION 4 ADDRESS GENERATION UNIT ...
Page 77: ...MOTOROLA PROGRAM CONTROL UNIT 5 1 SECTION 5 PROGRAM CONTROL UNIT ...
Page 124: ...INSTRUCTION GROUPS 6 30 INSTRUCTION SET INTRODUCTION MOTOROLA ...
Page 125: ...MOTOROLA PROCESSING STATES 7 1 SECTION 7 PROCESSING STATES STOP WAIT EXCEPTION NORMAL RESET ...
Page 167: ...STOP PROCESSING STATE MOTOROLA PROCESSING STATES 7 43 ...
Page 168: ...STOP PROCESSING STATE 7 44 PROCESSING STATES MOTOROLA ...
Page 169: ...MOTOROLA PORT A 8 1 SECTION 8 PORT A ...
Page 176: ...PORT A INTERFACE 8 8 PORT A MOTOROLA ...
Page 177: ...MOTOROLA PLL CLOCK OSCILLATOR 9 1 SECTION 9 PLL CLOCK OSCILLATOR x x d Φ VCO ...
Page 191: ...10 2 ON CHIP EMULATION OnCE MOTOROLA SECTION 10 ON CHIP EMULATION OnCE ...
Page 218: ...USING THE OnCE MOTOROLA ON CHIP EMULATION OnCE 10 29 ...
Page 604: ...INSTRUCTION ENCODING A 338 INSTRUCTION SET DETAILS MOTOROLA ...
Page 605: ...MOTOROLA BENCHMARK PROGRAMS B 1 APPENDIX B BENCHMARK PROGRAMS T T T T T P1 P3 P2 P4 T T T ...
Page 609: ...BENCHMARK PROGRAMS MOTOROLA BENCHMARK PROGRAMS B 5 ...
Page 611: ...BENCHMARK PROGRAMS MOTOROLA BENCHMARK PROGRAMS B 7 ...
Page 613: ...BENCHMARK PROGRAMS MOTOROLA BENCHMARK PROGRAMS B 9 ...
Page 615: ...BENCHMARK PROGRAMS MOTOROLA BENCHMARK PROGRAMS B 11 ...