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MOTOROLA
DSP56000/DSP56001 USER’S MANUAL
A - 39
For other destination operands:
I0 — Not affected
I1 — Not affected
S0 — Not affected
S1 — Not affected
T — Not affected
LF — Not affected
Instruction Format:
BCLR
#n,X:ea
BCLR
#n,Y:ea
Opcode:
Instruction Fields:
#n=bit number=bbbbb,
ea=6-bit Effective Address=MMMRRR
Effective
Addressing Mode
M M M R R R
Memory SpaceS
Bit Number bbbbb
(Rn)-Nn
0 0 0 r r r X
Memory
0
00000
(Rn)+Nn
0 0 1 r r r Y
Memory
1
•
(Rn)-
0 1 0 r r r
•
(Rn)+
0 1 1 r r r
•
(Rn)
1 0 0 r r r 10111
(Rn+Nn)
1 0 1 r r r
-(Rn)
1 1 1 r r r
Absolute address
1 1 0 0 0 0
where “rrr” refers to an address register R0-R7
Timing: 4+mvb oscillator clock cycles
Memory: 1+ea program words
23
16
15
8
7
0
OPTIONAL EFFECTIVE ADDRESS EXTENSION
0
0
0
0
1
0
1
0
0
1
M
M
M
R
R
R
0
S
0
b
b
b
b
b
BCLR
Bit Test and Clear
BCLR
F
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S
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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