M68ICS08ABUM/D
A-11
APPENDIX A – TECHNICAL REFERENCE & TROUBLESHOOTING
10. Make sure that the MCU can enter and remain in monitor mode. For
this to happen, the following conditions must occur:
a. At the rising edge of
RST*
, the target MCU’s
IRQ*
pin must be at
V
TST
(8.0 Vdc). Using a dual-trace oscilloscope, trigger channel 1
on the rising edge of the MCU’s
RST*
pin and read the
IRQ*
pin
with channel 2. Start the ICS08ABZ software as described in Sec-
tion 1.6 HARDWARE QUICK START INSTRUCTIONS and
verify that the
IRQ*
signal is approximately 8.0 Vdc when
RST*
rises.
b. At the rising edge of
RST*
,
PTA0
,
PTC0
,
PTC1
, and
PTC3
must
be held at logic values 1, 1, 0, and 0, respectively. The logic levels
are 5.0 V CMOS logic levels (with the factory default setting, and
5.0 Vdc EVDD input or left EVDD input floating) Using a dual-
trace oscilloscope, trigger channel 1 on the rising edge of
RST*
and
read the corresponding MCU pin with channel 2.
PTA0
is the serial
data pin to and from the host PC and should be held at logic value 1
at the rising edge of
RST*
.
PTC0
,
PTC1
, and
PTC3
are controlled
by analog switch
U5
on the ICS08AB and should be approximately
5.0 V, 0 V, and 0 V respectively, at the rising edge of
RST*
. After
the rising edge of
RST*
, the MCU pins
PTC0
,
PTC1
, and
PTC3
are connected (by the ICS08AB) to the MON08 connector pins
TGT_PTC0
,
TGT_PTC1
, and
TGT_PTC3
, respectively. The
MCU’s
PTA0
pin is never connected to the target pins, as it is used
for host communication.
c.
IRQ*
must remain at 8.0 Vdc to hold the MCU in monitor mode.
The ICS08AB board has an
IRQ*
lockout feature to keep
IRQ*
at
8.0 Vdc when the
RST*
or
RST_IN*
signal is asserted (low) and
to keep it at 8.0 Vdc until after
RST*
goes high. The
TGT_IRQ*
signal is allowed to control the
IRQ*
signal when
RST*
is not
asserted.
11. Make sure that the target circuitry does not interfere with the monitor
mode communications. When connecting target circuitry to the MCU,
be sure to connect the circuits through the ICS08AB by connecting to
the
RST_OUT*
,
RST_IN*
,
TGT_IRQ*
,
TGT_PTA0
,
TGT_PTC0
,
TGT_PTC1
, and
TGT_PTC3
pins of the MON08 connector. These sig-
nals will be connected by the ICS08AB to the corresponding pins of the
MCU through the corresponding MON08 connector pins—
RST*
,
IRQ*
,
PTC0
,
PTC1
, and
PTC3
—after monitor mode is established.
TGT_PTA0
is never connected to
PTA0
, as the
PTA0
signal is being
used for host communications.
Summary of Contents for M68ICS08AB
Page 6: ... 4 CPU32XIPB D ...
Page 8: ... 6 CPU32XIPB D ...
Page 60: ......
Page 61: ......
Page 62: ......
Page 63: ......
Page 64: ......
Page 65: ......
Page 66: ...A 32 M68ICS08ABUM D APPENDIX A TECHNICAL REFERENCE TROUBLESHOOTING ...