Appendix B. Bit and Byte Ordering
B-13
Little-Endian Mode
Figure B-10. Two-Byte Transfer to PCI I/O Space—Little-Endian Mode
Processor
0 1 0 0
A[28–31]
Munge address
0 0 1 0
0
1
2
3
4
5
6
7
xx
xx
D2
D3
xx
xx
xx
xx
0
1
2
3
D3
D2
xx
xx
D2
D3
0x00
0x08
PCI I/O Space
XOR with 110
Byte lanes
PCI data bus (AD[31–0] during data phase)
PCI byte lanes (C/BE[1–0] asserted)
0 1 0 0
AD[3–0]
During address phase
Unmunges address
Runs PCI I/O transaction
Swaps byte lanes
Core
PA[28–31]
Internal peripheral logic data bus
CDU
Summary of Contents for MPC8240
Page 1: ...MPC8240UM D Rev 1 1 2001 MPC8240 Integrated Processor User s Manual ...
Page 38: ...xviii MPC8240 Integrated Processor User s Manual TABLES Table Number Title Page Number ...
Page 48: ...xlviii MPC8240 Integrated Processor User s Manual Acronyms and Abbreviations ...
Page 312: ...6 94 MPC8240 Integrated Processor User s Manual ROM Flash Interface Operation ...
Page 348: ...7 36 MPC8240 Integrated Processor User s Manual PCI Host and Agent Modes ...
Page 372: ...8 24 MPC8240 Integrated Processor User s Manual DMA Register Descriptions ...
Page 394: ...9 22 MPC8240 Integrated Processor User s Manual I2O Interface ...
Page 412: ...10 18 MPC8240 Integrated Processor User s Manual Programming Guidelines ...
Page 454: ...12 14 MPC8240 Integrated Processor User s Manual Internal Arbitration ...
Page 466: ...13 12 MPC8240 Integrated Processor User s Manual Exception Latencies ...
Page 516: ...16 14 Watchpoint Trigger Applications ...
Page 538: ...B 16 MPC8240 Integrated Processor User s Manual Setting the Endian Mode of Operation ...
Page 546: ...C 8 MPC8240 Integrated Processor User s Manual ...
Page 640: ...INDEX Index 16 MPC8240 Integrated Processor User s Manual ...