Chapter 3. Address Maps
3-17
Address Translation
3.3.3.4 Outbound Translation Window Register (OTWR)
The OTWR, shown in Figure 3-11 and Table 3-11, defines the outbound translation
window and outbound window size. The outbound window size in the OTWR sets the size
of both the outbound translation window in PCI memory space and the outbound memory
window in the processor address space. Software can alter the outbound translation base
address and the outbound translation window size during runtime. This allows software to
scroll through host memory or address alternate space as needed.
Figure 3-11. Outbound Translation Window Register (OTWR)—0x0_2308
Table 3-10. Bit Settings for OMBAR—0x0_2300
Bits
Name
Reset
Value
R/W
Description
31
—
1
R
Reserved. The outbound memory window must reside in the upper
2 Gbytes of the MPC8240 address space.
30–12
Outbound
memory base
address
Undefined
R/W
Processor address that is the starting address for the outbound
memory window. The outbound memory window must be aligned
based on the granularity specified by the outbound window size
specified in the OTWR.
11 – 0
—
All 0s
R
Reserved
Table 3-11. Bit Settings for OTWR—0x0_2308
Bits
Name
Reset
Value
R/W
Description
31–12 Outbound
translation
base address
Undefined
R/W
PCI memory address—the starting address for the outbound translation window.
The outbound translation window should be aligned based on the granularity
specified by the outbound window size.
11–5
—
All 0s
R
Reserved
4–0
Outbound
window size
All 0s
R/W
Outbound window size—The outbound window size is encoded as N where the
window size is 2
N+1
bytes. The minimum window size is 4 Kbytes; the maximum
window size is 1 Gbyte. Note that the outbound window size sets the size of both
the outbound memory window and the outbound translation window.
00000 Outbound address translation disabled
00001 Reserved
...
01010 Reserved
01011 2
12
= 4 Kbyte window size
01100 2
13
= 8 Kbyte window size
01101 2
14
= 16 Kbyte window size
...
11101 2
30
= 1 Gbyte window size
11110 Reserved
11111 Reserved
Note that the outbound memory window must not overlap with the EUMB.
Outbound Translation Base Address
0 0 0 0 0 0 0
31
12 11
5
4
0
Reserved
Outbound Window Size
Summary of Contents for MPC8240
Page 1: ...MPC8240UM D Rev 1 1 2001 MPC8240 Integrated Processor User s Manual ...
Page 38: ...xviii MPC8240 Integrated Processor User s Manual TABLES Table Number Title Page Number ...
Page 48: ...xlviii MPC8240 Integrated Processor User s Manual Acronyms and Abbreviations ...
Page 312: ...6 94 MPC8240 Integrated Processor User s Manual ROM Flash Interface Operation ...
Page 348: ...7 36 MPC8240 Integrated Processor User s Manual PCI Host and Agent Modes ...
Page 372: ...8 24 MPC8240 Integrated Processor User s Manual DMA Register Descriptions ...
Page 394: ...9 22 MPC8240 Integrated Processor User s Manual I2O Interface ...
Page 412: ...10 18 MPC8240 Integrated Processor User s Manual Programming Guidelines ...
Page 454: ...12 14 MPC8240 Integrated Processor User s Manual Internal Arbitration ...
Page 466: ...13 12 MPC8240 Integrated Processor User s Manual Exception Latencies ...
Page 516: ...16 14 Watchpoint Trigger Applications ...
Page 538: ...B 16 MPC8240 Integrated Processor User s Manual Setting the Endian Mode of Operation ...
Page 546: ...C 8 MPC8240 Integrated Processor User s Manual ...
Page 640: ...INDEX Index 16 MPC8240 Integrated Processor User s Manual ...