8-6
MPC8240 Integrated Processor User’s Manual
DMA Operation
If software dynamically adds more descriptors to a chain that is finished or currently in
progress, the CC bit should be set to restart the transferring process starting at the current
descriptor address.
8.3.2.2 Periodic DMA Feature
Periodic DMA is a feature that allows a DMA process to be repeated over and over again
with the same parameters while in chaining mode. This feature has potential use in
applications that require periodic movement of data. The MPC8240 uses two of the timers
in the EPIC unit to automatically signal the DMA channels to start a DMA process, without
the use of the processor interrupt. In this mode, timer 2 automatically signals DMA channel
0, and timer 3 automatically signals DMA channel 1. The following sequence describes the
steps to set up the periodic DMA feature:
1. Set up timer 2 (and/or timer 3) with the mask bit set (when the timer counts down,
no interrupt is generated to the processor). Program the timer to operate at the
appropriate rate and clear the CI bit in the corresponding GTBCR. Choose a rate for
the timer longer than the time required to complete transferring the DMA chain;
otherwise, unpredictable operation occurs. Note that the DMA controller services
the timer’s request only if the DMA controller is in the idle state (CB bit is cleared).
If the timer’s request occurs while the DMA controller is busy, then the request is
ignored.
2. Program the DMA channel to operate in chaining mode (described in
Section 8.3.2.1, “Basic Chaining Mode Initialization”).
3. Enable periodic DMA by setting the PDE bit in the DMR.
When the timer first expires, the DMA hardware begins the data movement. In this mode,
the current descriptor address is automatically saved for later use. When the timer expires
the second time, the DMA reloads the saved current descriptor address into the CDAR and
restarts. This process continues until an error condition occurs, or the timer is stopped.
Summary of Contents for MPC8240
Page 1: ...MPC8240UM D Rev 1 1 2001 MPC8240 Integrated Processor User s Manual ...
Page 38: ...xviii MPC8240 Integrated Processor User s Manual TABLES Table Number Title Page Number ...
Page 48: ...xlviii MPC8240 Integrated Processor User s Manual Acronyms and Abbreviations ...
Page 312: ...6 94 MPC8240 Integrated Processor User s Manual ROM Flash Interface Operation ...
Page 348: ...7 36 MPC8240 Integrated Processor User s Manual PCI Host and Agent Modes ...
Page 372: ...8 24 MPC8240 Integrated Processor User s Manual DMA Register Descriptions ...
Page 394: ...9 22 MPC8240 Integrated Processor User s Manual I2O Interface ...
Page 412: ...10 18 MPC8240 Integrated Processor User s Manual Programming Guidelines ...
Page 454: ...12 14 MPC8240 Integrated Processor User s Manual Internal Arbitration ...
Page 466: ...13 12 MPC8240 Integrated Processor User s Manual Exception Latencies ...
Page 516: ...16 14 Watchpoint Trigger Applications ...
Page 538: ...B 16 MPC8240 Integrated Processor User s Manual Setting the Endian Mode of Operation ...
Page 546: ...C 8 MPC8240 Integrated Processor User s Manual ...
Page 640: ...INDEX Index 16 MPC8240 Integrated Processor User s Manual ...