Chapter 8. DMA Controller
8-9
DMA Transfer Types
Another factor that can affect DMA performance is access to the PCI bus. For more
information on the DMA arbitration boundaries for the PCI bus, see Section 7.2.1, “Internal
Arbitration for PCI Bus Access.”
8.4 DMA Transfer Types
The DMA controller supports four types of transfer—PCI to PCI; PCI to memory; memory
to PCI; and memory to memory. All data is temporarily stored in a 64-byte DMA queue
before transmission.
8.4.1 PCI to PCI
For PCI memory to PCI memory transfers, the DMA controller begins by reading data from
PCI memory space and storing it in the DMA queue. When the source and destination
addresses are aligned, the DMA transfer occurs after 64 bytes of data have been stored in
the queue. When the source and destination addresses are misaligned, the DMA transfer
occurs after 32 bytes of data have been stored in the queue. For the last transfer, data in the
queue can be less than 32 bytes. The DMA controller begins writing data to PCI memory
space beginning at the destination address. The process is repeated until there is no more
data to transfer, or an error condition has occurred on the PCI bus.
8.4.2 PCI to Local Memory
For PCI memory to local memory transfers, the DMA controller initiates reads on the PCI
bus and stores the data in the DMA queue. When at least 32 bytes of data is in the queue, a
local memory write is initiated. The DMA controller stops the transferring process either
when there is an error condition on the PCI bus or local memory interface, or when no data
is left to transfer. Reading from PCI memory and writing to local memory can occur
concurrently.
8.4.3 Local Memory to PCI
For local memory to PCI memory transfers the DMA controller initially fetches data from
local memory into the DMA queue. As soon as the first data arrives into the queue, the
DMA engine initiates write transactions to PCI memory. The DMA controller stops the
transferring process either when there is an error on the PCI bus or local memory interface,
or when no data is left to transfer. Reading from local memory and writing to PCI memory
can occur concurrently.
8.4.4 Local Memory to Local Memory
For local memory to local memory transfers, the DMA controller begins reading data from
local memory and stores it in the DMA queue. When the source and destination addresses
are aligned, the DMA transfer occurs after 64 bytes of data have been stored in the queue.
Summary of Contents for MPC8240
Page 1: ...MPC8240UM D Rev 1 1 2001 MPC8240 Integrated Processor User s Manual ...
Page 38: ...xviii MPC8240 Integrated Processor User s Manual TABLES Table Number Title Page Number ...
Page 48: ...xlviii MPC8240 Integrated Processor User s Manual Acronyms and Abbreviations ...
Page 312: ...6 94 MPC8240 Integrated Processor User s Manual ROM Flash Interface Operation ...
Page 348: ...7 36 MPC8240 Integrated Processor User s Manual PCI Host and Agent Modes ...
Page 372: ...8 24 MPC8240 Integrated Processor User s Manual DMA Register Descriptions ...
Page 394: ...9 22 MPC8240 Integrated Processor User s Manual I2O Interface ...
Page 412: ...10 18 MPC8240 Integrated Processor User s Manual Programming Guidelines ...
Page 454: ...12 14 MPC8240 Integrated Processor User s Manual Internal Arbitration ...
Page 466: ...13 12 MPC8240 Integrated Processor User s Manual Exception Latencies ...
Page 516: ...16 14 Watchpoint Trigger Applications ...
Page 538: ...B 16 MPC8240 Integrated Processor User s Manual Setting the Endian Mode of Operation ...
Page 546: ...C 8 MPC8240 Integrated Processor User s Manual ...
Page 640: ...INDEX Index 16 MPC8240 Integrated Processor User s Manual ...