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MPC8240 Integrated Processor User’s Manual
Detailed Signal Descriptions
State Meaning
Asserted/Negated—When the interrupt signal is asserted (according
to the programmed polarity), the priority is checked by the EPIC
unit, and the interrupt is conditionally passed to the processor as
described in Chapter 11, “Embedded Programmable Interrupt
Controller (EPIC) Unit.”
2.2.3.2 Serial Interrupt Mode Signals
The serial interrupt mode provides for up to 16 interrupts to be serially clocked in through
the S_INT signal. The relative timing for these signals is described in Section 11.6.2,
“Serial Interrupt Timing Protocol.”
2.2.3.2.1 Serial Interrupt Stream (S_INT)—Input
This signal represents the incoming interrupt stream in serial interrupt mode.
State Meaning
Asserted/Negated—Represents the interrupts for up to 16 external
interrupt sources with individually programmable sense and polarity.
These interrupts are clocked in to the MPC8240 by the S_CLK
signal.
2.2.3.2.2 Serial Interrupt Clock (S_CLK)—Output
This output serves as the serial clock that the external interrupt source must use for driving
the 16 interrupts onto the S_INT signal.
State Meaning
Asserted/Negated—The frequency of this clock signal is
programmed in the serial interrupt configuration register.
2.2.3.2.3 Serial Interrupt Reset (S_RST)—Output
Following is the state meaning of the S_RST signal.
State Meaning
Asserted/Negated—S_RST is asserted only once for two S_CLK
cycles when the EPIC is programmed to the serial interrupt mode.
2.2.3.2.4 Serial Interrupt Frame (S_FRAME)—Output
Following is the state meaning of the S_FRAME signal.
State Meaning
Asserted/Negated—Synchronizes the serial interrupt sampling to
interrupt source 00.
2.2.3.3 Local Interrupt (L_INT)—Output
Following is the state meaning of the L_INT signal.
State Meaning
Asserted/Negated—When the EPIC is programmed in pass-through
mode, this output reflects the raw interrupts generated by the on-chip
MU, I
2
C, and DMA controllers.
Summary of Contents for MPC8240
Page 1: ...MPC8240UM D Rev 1 1 2001 MPC8240 Integrated Processor User s Manual ...
Page 38: ...xviii MPC8240 Integrated Processor User s Manual TABLES Table Number Title Page Number ...
Page 48: ...xlviii MPC8240 Integrated Processor User s Manual Acronyms and Abbreviations ...
Page 312: ...6 94 MPC8240 Integrated Processor User s Manual ROM Flash Interface Operation ...
Page 348: ...7 36 MPC8240 Integrated Processor User s Manual PCI Host and Agent Modes ...
Page 372: ...8 24 MPC8240 Integrated Processor User s Manual DMA Register Descriptions ...
Page 394: ...9 22 MPC8240 Integrated Processor User s Manual I2O Interface ...
Page 412: ...10 18 MPC8240 Integrated Processor User s Manual Programming Guidelines ...
Page 454: ...12 14 MPC8240 Integrated Processor User s Manual Internal Arbitration ...
Page 466: ...13 12 MPC8240 Integrated Processor User s Manual Exception Latencies ...
Page 516: ...16 14 Watchpoint Trigger Applications ...
Page 538: ...B 16 MPC8240 Integrated Processor User s Manual Setting the Endian Mode of Operation ...
Page 546: ...C 8 MPC8240 Integrated Processor User s Manual ...
Page 640: ...INDEX Index 16 MPC8240 Integrated Processor User s Manual ...