MOTOROLA
Chapter 7. 60x Signals
7-15
Part III. The Hardware Interface
Timing Comments
Assertion/NegationÑThe same as the data bus.
High ImpedanceÑThe same as the data bus.
7.2.7.2.2 Data Bus Parity (DP[0Ð7])ÑInput
Following are the state meaning and timing comments for the DP input signals.
State Meaning
Asserted/NegatedÑRepresents odd parity for each byte of read data.
Parity is checked on all data byte lanes, regardless of the size of the
transfer. Detected even parity causes a checkstop if data parity errors
are enabled in the BCS[PAR_EN].
Timing Comments
Assertion/NegationÑThe same as D[0Ð63].
7.2.8 Data Transfer Termination Signals
Data termination signals are required after each data beat in a data transfer. Note that in a
single-beat transaction that is not a port-size transfer, the data termination signals also
indicate the end of the tenure. In burst or port size accesses, the data termination signals
apply to individual beats and indicate the end of the tenure only after the Þnal data beat. For
a detailed description of how these signals interact, see Section 8.5, ÒData Tenure
Operations.Ó
7.2.8.1 Transfer Acknowledge (TA)
The transfer acknowledge (TA) signal is both input and output on the MPC8260.
7.2.8.1.1 Transfer Acknowledge (TA)ÑInput
Following are the state meaning and timing comments for the TA input signal.
State Meaning
AssertedÑIndicates that a single-beat data transfer completed
successfully or that a data beat in a burst transfer completed
successfully. Note that TA must be asserted for each data beat in a
burst transaction. For more information, see Section 8.5.3, ÒData
Bus Transfers and Normal Termination.Ó
Table 7-1. DP[0Ð7] Signal Assignments
Signal Name
Data Bus Signal Assignments
DP0
D[0Ð7]
DP1
D[8Ð15
DP2
D[16Ð23]
DP3
D[24Ð31]
DP4
D[32Ð39]
DP5
D[40Ð47]
DP6
D[48Ð55]
DP7
D[56Ð63]
Summary of Contents for MPC8260 PowerQUICC II
Page 1: ...MPC8260UM D 4 1999 Rev 0 MPC8260 PowerQUICC II UserÕs Manual ª ª ...
Page 66: ...lxvi MPC8260 PowerQUICC II UserÕs Manual MOTOROLA ...
Page 88: ...1 18 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA Part I Overview ...
Page 120: ...2 32 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA Part I Overview ...
Page 138: ...Part II iv MPC8260 PowerQUICC II UserÕs Manual MOTOROLA Part II Configuration and Reset ...
Page 184: ...4 46 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA Part II ConÞguration and Reset ...
Page 202: ...Part III vi MPC8260 PowerQUICC II UserÕs Manual MOTOROLA Part III The Hardware Interface ...
Page 266: ...8 34 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA Part III The Hardware Interface ...
Page 382: ...10 106 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA Part III The Hardware Interface ...
Page 392: ...11 10 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA Part III The Hardware Interface ...
Page 430: ...Part IV viii MOTOROLA Part IV Communications Processor Module ...
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Page 980: ...A 4 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA Appendixes ...
Page 1002: ...Index 22 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA INDEX ...
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