10-78
MPC8260 PowerQUICC II UserÕs Manual
MOTOROLA
Part III. The Hardware Interface
Figure 10-65. UPM Read Access Data Sampling
10.6.4.4 Signals Negation
When the LAST bit is read in a RAM word, the current UPM pattern terminates. On the
next cycle all the UPM signals are negated unconditionally (driven to logic Ô1Õ).
This negation will not occur only if there is a back-to-back UPM request pending. In this
case the signals value on the cycle following the LAST bit, will be taken from the Þrst line
of the pending UPM routine.
10.6.4.5 The Wait Mechanism
The WAEN bit in the RAM array word, shown in Table 10-35, can be used to enable the
UPM wait mechanism in selected UPM RAM words.
If the UPM reads a RAM word with the WAEN bit set, the external UPWAIT signal is
sampled and synchronized by the memory controller and the current request is frozen. The
UPWAIT signal is sampled at the rising edge of CLKIN. If UPWAIT is asserted and
WAEN = 1 in the current UPM word, the UPM is frozen until UPWAIT is negated. The
value of the external pins driven by the UPM remains as indicated in the previous word read
by the UPM. When UPWAIT is negated, the UPM continues its normal functions. Note that
during the WAIT cycles, the UPM negates PSDVAL.
Figure 10-66 shows how the WAEN bit in the word read by the UPM and the UPWAIT
signal are used to hold the UPM in a particular state until UPWAIT is negated. As the
example in Figure 10-66 shows, the CSx and GPL1 states (C12 and F) and the WAEN value
(C) are frozen until UPWAIT is recognized as deasserted. WAEN is typically set before the
line that contain UTA = 1.
To internal
data bus
CLKIN
UPMx selected to handle the transfer
AND
(GPL4xDIS = 1) and RD/WR and DLT2x
Data Bus
M
U
L
T
I
P
L
E
X
E
R
Summary of Contents for MPC8260 PowerQUICC II
Page 1: ...MPC8260UM D 4 1999 Rev 0 MPC8260 PowerQUICC II UserÕs Manual ª ª ...
Page 66: ...lxvi MPC8260 PowerQUICC II UserÕs Manual MOTOROLA ...
Page 88: ...1 18 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA Part I Overview ...
Page 120: ...2 32 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA Part I Overview ...
Page 138: ...Part II iv MPC8260 PowerQUICC II UserÕs Manual MOTOROLA Part II Configuration and Reset ...
Page 184: ...4 46 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA Part II ConÞguration and Reset ...
Page 202: ...Part III vi MPC8260 PowerQUICC II UserÕs Manual MOTOROLA Part III The Hardware Interface ...
Page 266: ...8 34 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA Part III The Hardware Interface ...
Page 382: ...10 106 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA Part III The Hardware Interface ...
Page 392: ...11 10 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA Part III The Hardware Interface ...
Page 430: ...Part IV viii MOTOROLA Part IV Communications Processor Module ...
Page 490: ...14 36 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA Part IV Communications Processor Module ...
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Page 980: ...A 4 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA Appendixes ...
Page 1002: ...Index 22 MPC8260 PowerQUICC II UserÕs Manual MOTOROLA INDEX ...
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