A-2
SE4400 Integration Guide
0x09
0x85
NSUB DC level
0x0A
0x03
UV0, UV1 input
0x0B
0x00
Y output
0x0E
0x00
VGA CCD
0x0F
0x9F
8 bit raw output
0x10
0x05
Mode 3, 763 clocks/line
0x11
0xFB
HSGCLK=763clk
0x12
0x06
HSGCLK=763clk
0x1E
0x00
PCLK output
0x23
0x08
Edge setting
0x28
0x00
HT phase
0x29
0x08
HTR phase
0x2A
0x09
DS1 phase
0x2B
0x05
DS2 phase
0x2F
0x24
763 H clk
0x30
0x95
HREF J=149
0x32
0x15
HREF K=789
0x33
0x03
HREFK
0x34
0x08
VREF J=8
0x36
0xE8
VREF K=488
0x3A
0xA2
DRC1SL, 2H
0x3B
0x63
DRC2SL6 1/16
0x3E
0x19
DRHD=25
0x3F
0xC1
DRHD2=705
0x40
0x02
DRHD2=705
Table A-1. Mode 3 I
2
C Register Settings: Initial Setting A (continued)
Register
Address (HEX)
Register Data
(HEX)
Comment
Note
: The register data must be written in the order shown.
Summary of Contents for Symbol SE4400
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Page 3: ...SE4400 Integration Guide 72E 63399 04 Revision A January 2007 ...
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