3-12
MS-6737 ATX Mainboard
Advanced Chipset Features
MSI Reminds You...
Change these settings only if you are familiar with the chipset.
CAS Latency
The field controls the CAS latency, which determines the timing delay before
SDRAM starts a read command after receiving it. Setting options:
By SPD,
3T, 2.5T, 2T
.
2T
increases system performance while 2.5T provides more
stable system performance. Setting to By SPD enables DRAM CAS# Latency
automatically to be determined by BIOS based on the configurations of the
SPD (Serial Presence Detect) EEPROM on the DRAM module.
Timing Setting Mode
The DRAM timing is controlled by the DRAM Timing Registers. The Tim-
ings programmed into this register are dependent on the system design. Slower
rates may be required in certain system designs to support loose layouts or
slower memory. Setting options:
Safe
,
Normal
,
Fast
,
Turbo
,
Ultra
.
