24
CPu technology Support
Press <enter> to enter the submenu, that shows the technologies that the
installed CPu supported.
intel eiSt
the enhanced intel SpeedStep technology allows you to set the performance
level of the microprocessor whether the computer is running on battery or aC
power. this field will appear after you installed the CPu which support speed-
step technology.
adjust CPu FSB Frequency (mHz)
this item allows you to adjust the CPu FSB frequency.
adjusted CPu Frequency (mHz)
it shows the adjusted CPu frequency (FSB x Ratio). Read-only.
memoRy-Z
Press <enter> to enter the submenu.
dimm/2 memory SPd information
Press <enter> to enter the submenu, that displays the informations of in-
stalled memory.
advance dRam Configuration
Press <enter> to enter the submenu.
dRam timing mode
Selects whether dRam timing is controlled by the SPd (Serial Presence
detect) eePRom on the dRam module. Setting to [auto By SPd] enables
dRam timings and the following related items to be determined by BioS
based on the configurations on the SPd. Selecting [manual] allows users to
configure the dRam timings and the following related items manually.
CaS Latency (CL)
When the dRam timing mode sets to [manual], the field is adjustable. this
controls the CaS latency, which determines the timing delay (in clock cycles)
before SdRam starts a read command after receiving it.
tRCd
When the dRam timing mode sets to [manual], the field is adjustable. When
dRam is refreshed, both rows and columns are addressed separately. this
setup item allows you to determine the timing of the transition from RaS (row
address strobe) to CaS (column address strobe). the less the clock cycles,
the faster the dRam performance.
tRP
When the dRam timing mode sets to [manual], the field is adjustable. this
item controls the number of cycles for Row address Strobe (RaS) to be al-
lowed to precharge. if insufficient time is allowed for the RaS to accumulate
its charge before dRam refresh, refreshing may be incomplete and dRam
may fail to retain data. this item applies only when synchronous dRam is
installed in the system.
tRaS
When the dRam timing mode sets to [manual], the field is adjustable. this
Summary of Contents for G41M-P34
Page 8: ...117 117 118 120 120 BIOS 130 135 135 136 I O 138 138 BIOS 148...
Page 30: ...30 LGA 775 CPU LGA 775 CPU CPU LGA775 CPU CPU 1 1 VGA HDMI USB LAN USB RS CS SS...
Page 32: ...32 DIMM DIMM DIMM DIMM DIMM 2 3 DIMM DIMM1...
Page 44: ...44 EMI EMI EMI EMI EMI Load Optimized Defaults...
Page 84: ...84 LGA 775 LGA 775 LGA775 1 1 VGA HDMI USB LAN USB RS CS SS...
Page 85: ...85 MS 7592 BIOS 2 3 4 5 6 7 8 9 0 2 3...
Page 86: ...86 DIMM DIMM DIMM DIMM DIMM 2 3 DIMM1...
Page 104: ...104 DIMM 2 3 DIMM1...
Page 116: ...116...
Page 120: ...120 LGA775 VGA HDMI USB LAN USB RS CS SS LGA775 CPU LGA775 CPU Pin1 Pin1...
Page 121: ...121 MS 7592 CPU CPU CPU CPU CPU CPU CPU CPU BIOS CPU CPU CPU 2 3 4 5 6 7 8 9 0 2 3...
Page 122: ...122 2 3 DIMM1...
Page 134: ...134...
Page 140: ...140 DIMM DIMM DIMM 2 3 DIMM1...
Page 152: ...152 Disabled Enabled Spread Spectrum Disabled Load Optimized Defaults BIOS...
