CHAPTER 3
AWARD
®
BIOS SETUP
3-14
Video BIOS Cacheable
Select Enabled allows caching of the video BIOS , resulting in better
system performance. However, if any program writes to this memory area, a
system error may result. The settings are: Enabled and Disabled.
Memory Hole At 15M-16M
You can reserve this area of system memory for ISA adapter ROM.
When this area is reserved, it cannot be cached. The user information of
peripherals that need to use this area of system memory usually discusses
their memory requirements. The settings are: Enabled and Disabled.
CPU Latency Timer
During Enabled, A deferrable CPU cycle will only be Deferred after it
has been in a Snoop Stall for 31 clocks and another ADS# has arrived.
During Disabled, A deferrable CPU cycle will be Deferred immediately after
the GMCH receives another ADS#.
Delayed Transaction
The chipset has an embedded 32-bit posted write buffer to support
delay transactions cycles. Select Enabled to support compliance with PCI
specification version 2.1. The settings are: Enabled and Disabled.
On-Chip Video Window Size
This option enabled/disabled the on-chip video window size for VGA
driver use. The settings are: Enabled, Disabled.
