BIOS Setup
3-13
SDRAM CAS# Latency
The field controls the CAS latency, which determines the timing delay
before SDRAM starts a read command after receiving it. Setting options:
2.5 Clocks, 2 Clocks
.
2 Clocks
increases system performance while
2.5
Clocks
provides more stable system performance.
SDRAM RAS# Precharge
This setting controls the number of cycles for Row Address Strobe (RAS)
to be allowed to precharge. If insufficient time is allowed for the RAS to
accumulate its charge before DRAM refresh, refresh may be incomplete
and DRAM may fail to retain data. This item applies only when synchro-
nous DRAM is installed in the system. Setting options:
2 Clocks
,
3 Clocks
.
SDRAM RAS# to CAS# Delay
When DRAM is refreshed, both rows and columns are addressed
separately. This setup item allows you to determine the timing of the
transition from RAS (row address strobe) to CAS (column address strobe).
The less the clock cycles, the faster the DRAM performance. Setting
options:
3 Clocks
,
2 Clocks
.
SDRAM Precharge Delay
This setting controls the precharge delay, which determines the timing
delay for DRAM precharge. Setting options:
5 Clocks, 6 Clocks, 7 Clocks
.
SDRAM Idle Timer
This setting selects the amount of time in HCLKs that the DRAM controller
waits to close a DRAM page after the CPU becomes idle.
Memory Hole
In order to improve performance, certain space in memory can be reserved for
ISA cards. This memory must be mapped into the memory space below 16MB.
When this area is reserved, it cannot be cached. Setting options:
Disabled,
15MB-16MB
.
